Semiconductor integrated circuit device
View Patent ↗A semiconductor integrated circuit device for fast and low power operations, comprising a plurality of circuit blocks of a chip, each of which has a plurality of states with different power consumption values. A power management circuit determines the state of each of the circuit blocks so as not to exceed a maximum power consumption value of the semiconductor integrated circuit device by considering the power consumption of each circuit block and by each state transition in each circuit block. The maximum power consumption value may be preset or adjustable after fabrication.
1. A semiconductor integrated circuit device comprising:
a plurality of circuit blocks, each of the plurality of circuit blocks having at least a first state and a second state;
wherein each of the circuit blocks comprises a power line which supplies a supply voltage;
wherein the supply voltage in the first state is higher than the supply voltage in the second state; and
wherein a state transition from the second state to the first state in each of the circuit blocks is permitted if a power consumption of the semiconductor integrated circuit device does not exceed a preset maximum power consumption of the semiconductor integrated circuit device.
2. The semiconductor integrated circuit device according to claim 1 ,
wherein each of the circuit blocks comprises a storage element; and
wherein the supply voltage is set so as not to erase information stored in the storage element.
3. The semiconductor integrated circuit device according to claim 2 , wherein the storage element is a flip-flop.
4. The semiconductor integrated circuit device according to claim 1 , further comprising:
a power manager circuit;
wherein the manager circuit controls the supply voltage of each of the circuit blocks.
5. A semiconductor integrated circuit device, comprising:
a plurality of circuit blocks;
wherein each of the circuit blocks comprises a means for changing an operational frequency of a distributed clock into each of the circuit blocks;
wherein the operational frequency in a first state is higher than the operational frequency in a second state; and
wherein the state transition from the second state to the first state is permitted in each of the circuit blocks if a power consumption of the semiconductor integrated circuit device does not exceed a preset maximum power consumption of the semiconductor integrated circuit device.
6. The semiconductor integrated circuit device according to claim 5 ,
wherein the means for changing the operation frequency is a divider circuit or a phase locked loop circuit.
7. The semiconductor integrated circuit device according to claim 5 , further comprising:
a power manager circuit;
wherein the manager circuit controls the means for changing operational frequency of each of the circuit blocks.
8. A semiconductor integrated circuit device, comprising:
a plurality of circuit blocks;
wherein each of the circuit blocks comprises a power line which supplies a supply voltage and a means for changing an operational frequency of a distributed clock into each of the circuit blocks;
wherein the supply voltage in a first state is higher than the supply voltage in a second state;
wherein the frequency in the first state is higher than the frequency in a second state; and
wherein the state transition from the second state to the first state is permitted in each of the circuit blocks if a power consumption of the semiconductor integrated circuit device does not exceed a preset maximum power consumption of the semiconductor integrated circuit device.
9. The semiconductor integrated circuit device according to claim 8 ,
wherein each of the circuit blocks comprises a storage element; and
wherein the supply voltage is set so as not to erase the information stored in the storage element.
10. The semiconductor integrated circuit device according to claim 9 , wherein the storage element is a flip-flop.
11. The semiconductor integrated circuit device according to claim 8 ,
wherein the means for changing the operational frequency is a divider circuit or a phase locked loop circuit.
12. The semiconductor integrated circuit device according to claim 8 , further comprising:
a power manager circuit;
wherein the manager circuit controls the supply voltage and the means for changing operational frequency of each of the circuit blocks.
13. The semiconductor integrated circuit device according to claim 8 , further comprising:
a memory;
wherein the memory stores the preset maximum power consumption.
14. The semiconductor integrated circuit device according to claim 13 ,
wherein the memory is a non-volatile memory.
15. The semiconductor integrated circuit device according to claim 8 ,
wherein the preset maximum power consumption is read from an external source when the semiconductor integrated circuit device is powered.
16. The semiconductor integrated circuit device according to claim 8 ,
wherein the preset maximum power consumption is changed after the semiconductor integrated circuit device is powered.
17. The semiconductor integrated circuit device according to claim 8 ,
wherein the preset maximum power consumption is changed according to a temperature of the semiconductor integrated circuit device.
18. The semiconductor integrated circuit device according to claim 8 ,
wherein a battery is used to drive the semiconductor integrated circuit device; and
wherein the preset maximum power consumption is changed according to a residual level of the battery.