IP Library Granted Patent US 7,522,441
Granted Patent B2
US 7,522,441 · App. 11/270,553 · Granted Apr 21, 2009

Integrated circuit device and electronic instrument

Assignee: Seiko Epson Corporation
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Quick Facts
Patent No.
US 7,522,441
App. No.
11/270,553
Granted
Apr 21, 2009
Kind
B2
Abstract

An integrated circuit device including first to Nth circuit blocks CB 1 to CBN disposed along a first direction D 1 , when the first direction D 1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D 2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The circuit blocks CB 1 to CBN include a high-speed interface circuit block HB which transfers data through a serial bus using differential signals, and a circuit block other than HB. The high-speed interface circuit block HB is disposed as an Mth circuit block CBM (2≦M≦N−1) of the circuit blocks CB 1 to CBN.

Claims (51)

1. An integrated circuit device, comprising:

first to Nth circuit blocks (N is an integer larger than one) disposed along a first direction, when the first direction is a direction from a first side of the integrated circuit device toward a third side that is opposite to the first side, the first side being a short side, and when a second direction is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side,

the first to Nth circuit blocks including a high-speed interface circuit block which transfers data through a serial bus using differential signals, and a circuit block other than the high-speed interface circuit block, and

the high-speed interface circuit block being disposed as an Mth circuit block (2≦M≦N−1) of the first to Nth circuit blocks.

2. The integrated circuit device as defined in claim 1 ,

a value M satisfies [N/2]−2≦M≦[N/2]+3 ([X] being maximum integer which does not exceed X).

3. The integrated circuit device as defined in claim 1 ,

the Mth circuit block including the high-speed interface circuit block and another circuit block.

4. The integrated circuit device as defined in claim 3 ,

the other circuit block of the Mth circuit block being a logic circuit block which generates a display control signal.

5. The integrated circuit device as defined in claim 4 ,

the first to Nth circuit blocks including a grayscale voltage generation circuit block which generates grayscale voltages; and

the Mth circuit block including the logic circuit block and the high-speed interface circuit block is disposed adjacent to the grayscale voltage generation circuit block along the first direction.

6. The integrated circuit device as defined in claim 5 ,

the first to Nth circuit blocks including at least one data driver block which receives the grayscale voltages from the grayscale voltage generation circuit block and drives data lines, and

the grayscale voltage generation circuit block being disposed between the Mth circuit block including the logic circuit block and the high-speed interface circuit block, and the data driver block.

7. The integrated circuit device as defined in claim 3 ,

the other circuit block of the Mth circuit block being a grayscale voltage generation circuit block which generates grayscale voltages.

8. The integrated circuit device as defined in claim 7 ,

the first to Nth circuit blocks including a logic circuit block which generates a display control signal and sets grayscale characteristic adjustment data, and

the Mth circuit block including the grayscale voltage generation circuit block and the high-speed interface circuit block being disposed adjacent to the logic circuit block along the first direction.

9. The integrated circuit device as defined in claim 8 ,

the first to Nth circuit blocks including at least one data driver block that receives the grayscale voltages from the grayscale voltage generation circuit block and drives data lines, and

the Mth circuit block including the grayscale voltage generation circuit block and the high-speed interface circuit block is disposed between the logic circuit block and the data driver block.

10. The integrated circuit device as defined in claim 1 , comprising:

a first interface region provided along the fourth side and on the second direction side of the first to Nth circuit blocks; and

a second interface region provided along the second side and on a fourth direction side of the first to Nth circuit blocks, the fourth direction being opposite to the second direction.

11. The integrated circuit device as defined in claim 10 ,

the high-speed interface circuit block being disposed adjacently on the second direction side of the second interface region.

12. The integrated circuit device as defined in claim 10 ,

when a width of the integrated circuit device in the second direction is denoted by W and a length of the integrated circuit device in the first direction is denoted by LD, a shape ratio SP of the integrated circuit device satisfies SP=LD/W and SP>10.

13. The integrated circuit device as defined in claim 10 ,

when widths of the first interface region, the first to Nth circuit blocks, and the second interface region in the second direction are respectively denoted by W 1 , WB, and W 2 , a width W of the integrated circuit device in the second direction satisfies W 1 +WB+W 2 ≦W<W 1 +2×WB+W 2 .

14. The integrated circuit device as defined in claim 12 ,

when widths of the first interface region, the first to Nth circuit blocks, and the second interface region in the second direction are respectively denoted by W 1 , WB, and W 2 , a width W of the integrated circuit device in the second direction satisfies W 1 +WB+W 2 ≦W<W 1 +2×WB+W 2 .

15. The integrated circuit device as defined in claim 13 ,

the width W of the integrated circuit device in the second direction satisfies W<2×WB.

16. The integrated circuit device as defined in claim 14 ,

the width W of the integrated circuit device in the second direction satisfies W<2×WB.

17. An electronic instrument, comprising:

the integrated circuit device as defined in claim 1 ; and

a display panel driven by the integrated circuit device.

18. An electronic instrument, comprising:

the integrated circuit device as defined in claim 3 ; and

a display panel driven by the integrated circuit device.

19. An electronic instrument, comprising:

the integrated circuit device as defined in claim 10 ; and

a display panel driven by the integrated circuit device.

20. An electronic instrument, comprising:

the integrated circuit device as defined in claim 13 ; and

a display panel driven by the integrated circuit device.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2020
From: SEIKO EPSON CORPORATION
To: 138 EAST LCD ADVANCEMENTS LIMITED
Reel/Frame 053671/0900 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2005
From: KUMAGAI, TAKASHI; ISHIYAMA, HISANOBU; MAEKAWA, KAZUHIRO; ITO, SATORU; FUJISE, TAKASHI; KARASAWA, JUNICHI; KODAIRA, SATORU
To: SEIKO EPSON CORPORATION
Reel/Frame 017208/0758 →
Priority Claims (1)
JP 2005-191709 · Jun 30, 2005 · national
Continuity (1)
Related Publication 20070002061A1 · Jan 4, 2007