Automatic mode setting and power ramp compensator for system power on conditions
View Patent ↗A GPS receiver with automatic mode-setting and power ramping circuitry is disclosed. AGPS receiver in accordance with the present invention comprises a first switch network, comprising a plurality of transistors, a first plurality of circuit components, coupled to the first switch network, wherein the switch network selects paths through the circuit components to generate a Power On Signal (POS) and ramp power to the GPS receiver, a plurality of test points, coupled to circuitry within the GPS receiver, wherein the test points are used to test intermediate stages of output of the GPS receiver, a second plurality of circuit components, each circuit component coupled to a corresponding test point in a respective manner, wherein the circuit components create outputs used in initialization of the GPS receiver, and a second switch network, coupled between the circuitry in the GPS receiver and the plurality of test points, for selectively switching the plurality of test points from being used to test intermediate stages of output of the GPS receiver and creating outputs used in initialization.
1. A mode-setting device for initializing a GPS receiver in a preferred state, comprising:
a plurality of test points, coupled to circuitry within the GPS receiver, wherein the test points are used to test intermediate stages of output of the GPS receiver;
a plurality of circuit components, each circuit component coupled to a corresponding test point in a respective manner, wherein the circuit components create outputs used in initialization of the GPS receiver; and
a switch network, coupled between the circuitry in the GPS receiver and the plurality of test points, for selectively switching the plurality of test points from being used to test intermediate stages of output of the GPS receiver and creating outputs used in initialization.
2. The mode-setting device of claim 1 , wherein the circuit components are resistors.
3. The mode-setting device of claim 2 , wherein the outputs used in initialization are logic level outputs.
4. The mode-setting device of claim 3 , wherein the logic level outputs are used to select a mode of the GPS receiver during power up of the GPS receiver.
5. The mode-setting device of claim 4 , wherein the selective switching of the test points is based on a presence of a Power On Signal (POS).
6. The mode-setting device of claim 5 , wherein the selective switching of the test points is further based on a presence of an enable signal.
7. A Power On Signal (POS) generating device for ramping up power to a circuit during a power up state, comprising:
a switch network, comprising a plurality of transistors;
a plurality of capacitors, coupled to the switch network, wherein the switch network selectively charges each capacitor in a predetermined manner, wherein the predetermined manner is selected based on a quality of a power supply used to power up the circuit and a POS signal is generated after a power supply output has reached a desired voltage value, wherein the POS generating device uses a fractional part of the power supply output and a base-emitter voltage to begin generation of the POS signal and a delayed POS signal.
8. The POS device of claim 7 , wherein the device is used in a Global Positioning System (GPS) receiver.
9. The POS device of claim 8 , further comprising a mode-setting device for initializing the GPS receiver.
10. The POS device of claim 9 , wherein the mode-setting device comprises a plurality of test points, coupled to circuitry within the GPS receiver, wherein the test points are used to test intermediate stages of output of the GPS receiver; a plurality of circuit components, each circuit component coupled to a corresponding test point in a respective manner, wherein the circuit components create outputs used in initialization of the GPS receiver; and a second switch network, coupled between the circuitry in the GPS receiver and the plurality of test points, for selectively switching the plurality of test points from being used to test intermediate stages of output of the GPS receiver and creating outputs used in initialization.
11. The POS device of claim 10 , wherein the POS device is resident on the GPS receiver chip.
12. A GPS receiver with initial mode-setting and power ramping circuitry, comprising:
a first switch network, comprising a plurality of transistors;
a first plurality of circuit components, coupled to the first switch network, wherein the switch network selects paths through the circuit components to generate a Power On Signal (POS) and ramp power to the GPS receiver;
a plurality of rest points, coupled to circuitry within the GPS receiver, wherein the test points are used to test intermediate stages of output of the GPS receiver;
a second plurality of circuit components, each circuit component coupled to a corresponding test point in a respective manner, wherein the circuit components create outputs used in initialization of the GPS receiver; and
a second switch network, coupled between the circuitry in the GPS receiver and the plurality of test points, for selectively switching the plurality of test points from being used to test intermediate stages of output of the GPS receiver and creating outputs used in initialization.
13. The GPS receiver of claim 12 , wherein the first plurality of circuit components is a plurality of capacitors.
14. The GPS receiver of claim 13 , wherein the second plurality of circuit components is a plurality of resistors.