IP Library Granted Patent US 7,523,299
Granted Patent B2
US 7,523,299 · App. 11/273,237 · Granted Apr 21, 2009

Method and system for modifying operation of ROM based boot code of a network adapter chip

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Quick Facts
Patent No.
US 7,523,299
App. No.
11/273,237
Granted
Apr 21, 2009
Kind
B2
Abstract

Certain embodiments for modifying operation of ROM based boot code may include modifying a bootup sequence for boot code resident in a ROM within a network adapter chip (NAC). The bootup sequence may be modified during booting of the NAC using code patches in memory external to the NAC. The boot code may comprise ROM loader code and/or self-boot code in the ROM within the NAC. Execution of the self-boot code may comprise execution of code patches. The code patches may comprise initialization code patches and service code patches. The code patches may be executed in place of functions in the self-boot code or in addition to the functions in the self-boot code. Additionally, the code patches may be configured such that a function in the self-boot code may be effectively deleted where no corresponding code patch may be executed in place of the function.

Claims (36)

1. A method for processing information, the method comprising:

determining a value of a one or more specified bits that indicate whether a code patch in memory external to a network adapter chip should be executed or skipped; and

based on said determination, modifying a bootup sequence for boot code resident in a ROM within said network adapter chip during booting of said network adapter chip using said code patch resident in said memory external to said network adapter chip.

2. The method according to claim 1 , comprising executing at least a portion of said code patch resident in said memory external to said network adapter chip during said booting of said network adapter chip.

3. The method according to claim 1 , comprising verifying presence of valid code patch resident in said memory external to said network adapter chip.

4. The method according to claim 1 , wherein said code patch comprises at least one of the following: initialization code patch and service code patch.

5. The method according to claim 4 , comprising initializing said initialization code patch during said booting of said network adapter chip.

6. The method according to claim 4 , comprising initializing said service code patch during said booting of said network adapter chip.

7. The method according to claim 6 , comprising executing at least a portion of said initialization code patch during said booting of said network adapter chip prior to executing at least a portion of said service code patch.

8. The method according to claim 4 , comprising executing at least a portion of said initialization code patch in addition to executing corresponding code in said boot code in said ROM.

9. The method according to claim 4 , comprising executing at least a portion of said initialization code patch in place of executing corresponding code in said boot code in said ROM.

10. The method according to claim 4 , comprising skipping execution of at least a portion of said initialization code patch and corresponding code in said boot code in said ROM during said booting of said network adapter chip.

11. The method according to claim 4 , comprising executing at least a portion of said service code patch in addition to executing corresponding code in said boot code in said ROM.

12. The method according to claim 4 , comprising executing at least a portion of said service code patch in place of executing corresponding code in said boot code in said ROM.

13. The method according to claim 4 , comprising skipping execution of at least a portion of said service code patch and corresponding code in said boot code in said ROM during said booting of said network adapter chip.

14. The method according to claim 1 , wherein said one or more specified bits comprises an override bit.

15. The method according to claim 14 , comprising executing said code patch when said one or more specified bits comprising said override bit is asserted.

16. The method according to claim 14 , comprising skipping said code patch when said one or more specified bits comprising said override bit is deasserted.

17. A system for processing information, the system comprising:

one or more circuits within a network adapter chip, said one or more circuits enable determining a value of a one or more specified bits that indicate whether a code patch in memory external to said network adapter chip should be executed or skipped; and

said one or more circuits enable modification of a bootup sequence for boot code resident in a ROM within said network adapter chip during booting of said network adapter chip using said code patch resident in said memory external to said network adapter chip.

18. The system according to claim 17 , wherein said one or more circuits enable execution of at least a portion of said code patch resident in said memory external to said network adapter chip during said booting of said network adapter chip.

19. The system according to claim 17 , wherein said one or more circuits enable verification of presence of valid code patch resident in said memory external to said network adapter chip.

20. The system according to claim 17 , wherein said code patch comprises at least one of the following: initialization code patch and service code patch.

21. The system according to claim 20 , wherein said one or more circuits enable initialization of said initialization code patch during said booting of said network adapter chip.

22. The system according to claim 20 , wherein said one or more circuits enable initialization of said service code patch during said booting of said network adapter chip.

23. The system according to claim 22 , wherein said one or more circuits enable execution of at least a portion of said initialization code patch during said booting of said network adapter chip prior to executing at least a portion of said service code patch.

24. The system according to claim 20 , wherein said one or more circuits enable execution of at least a portion of said initialization code patch in addition to executing corresponding code in said boot code in said ROM.

25. The system according to claim 20 , wherein said one or more circuits enable execution of at least a portion of said initialization code patch in place of executing corresponding code in said boot code in said ROM.

26. The system according to claim 20 , wherein said one or more circuits enable skipping of execution of at least a portion of said initialization code patch and corresponding code in said boot code in said ROM during said booting of said network adapter chip.

27. The system according to claim 20 , wherein said one or more circuits enable execution of at least a portion of said service code patch in addition to executing corresponding code in said boot code in said ROM.

28. The system according to claim 20 , wherein said one or more circuits enable execution of at least a portion of said service code patch in place of executing corresponding code in said boot code in said ROM.

29. The system according to claim 20 , wherein said one or more circuits enable skipping of execution of at least a portion of said service code patch and corresponding code in said boot code in said ROM during said booting of said network adapter chip.

30. The system according to claim 26 , wherein said one or more specified bits comprises an override bit.

31. The system according to claim 30 , wherein said code patch is executed when said one or more specified bits comprising said override bit is asserted.

32. The system according to claim 30 , wherein execution of said code patch is skipped when said one or more specified bits comprising said override bit is deasserted.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2005
From: YU, KELLY; TOMITA, TAKASHI; LEE, JONATHAN F.
To: BROADCOM CORPORATION
Reel/Frame 017150/0696 →