IP Library Granted Patent US 7,242,170
Granted Patent B1
US 7,242,170 · App. 11/278,822 · Granted Jul 10, 2007

Control circuit having error amplifier for DC-DC converter and control method therefor

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Quick Facts
Patent No.
US 7,242,170
App. No.
11/278,822
Granted
Jul 10, 2007
Kind
B1
Abstract

A control circuit for DC-DC converters and a control method therefor wherein unstable operation in which output voltage fluctuates can be detected and the unstable operation be prevented from continuing are provided. The control circuit includes: an error amplifier ERA 1 that has an inverting input terminal to which detecting voltage V 1 detected according to output voltage is inputted and a non-inverting input terminal to which reference voltage e 1 is inputted, and amplifies the difference voltage of detecting voltage relative to reference voltage e 1 ; and a detection unit 50 that detects that an error output signal VOP of the error amplifier ERA 1 stays at a predetermined voltage level. The detection unit 50 includes: a signal determination unit that determines that the predetermined voltage level is out of a normal operating range; and a duration count unit that detects that the predetermined voltage level stays out of the normal operating range for a predetermined time by the signal determination unit.

Claims (17)

1. A control circuit for DC-DC converters, comprising: an error amplifier that has an inverting input terminal to which detecting voltage detected according to output voltage is inputted and a non-inverting input terminal to which reference voltage is inputted, and amplifies the voltage difference of the detecting voltage relative to the reference voltage; and

a detection unit that detects that an error output signal of the error amplifier stays at a predetermined voltage level, the detection unit having a signal determination unit that detects that the predetermined voltage level is out of a normal operating range, and a duration count unit that detects that the predetermined voltage level continuously stays out of the normal operating range for a predetermined time by the signal determination unit.

2. The control circuit for DC-DC converters, according to claim 1 ,

wherein the signal determination unit has at least either of a first comparison unit that compares the predetermined voltage level with the maximum level of the normal operating range and thereby detects that the predetermined voltage level is higher than the maximum level, and a second comparison unit that compares the predetermined voltage level with the minimum level of the normal operating range and thereby detects that the predetermined voltage level is lower than the minimum level.

3. The control circuit for DC-DC converters, according to claim 1 ,

wherein the duration count unit is constructed of a plurality of flip-flops to which a clock signal is inputted and an AND circuit that carries out logic operation AND on the output signals of the individual flip-flops, and

wherein the flip-flops sequentially acquire an output signal from the signal determination unit in synchronization with the clock signal.

4. The control circuit for DC-DC converters, according to claim 2 ,

wherein the signal determination unit has the first comparison unit and the second comparison unit, and the signal determination unit alternately detects that the predetermined voltage level is higher than the maximum level and that the predetermined voltage level is lower than the minimum level.

5. A control method for DC-DC converters,

wherein, after detecting voltage detected according to output voltage is compared with reference voltage, an error output signal obtained by amplifying the difference voltage of the detecting voltage relative to the reference voltage is outputted, and

wherein it is detected that the error output signal stays at a predetermined voltage level, it is determined that the predetermined voltage level is out of a normal operating range, and it is detected that the predetermined voltage level is continuously out of the normal operating range for a predetermined time.

6. The control method for DC-DC converters, according to claim 5 ,

wherein the predetermined voltage level is compared with the maximum level of the normal operating range to detect that the predetermined voltage level is higher than the maximum level, and/or the predetermined voltage level is compared with the minimum level of the normal operating range to detect that the predetermined voltage level is lower than the minimum level.

7. The control method for DC-DC converters, according to claim 5 ,

wherein signals related to the result of detection of at least either of that the predetermined voltage level is higher than the maximum level and that the predetermined voltage level is lower than the minimum level are acquired in sequence in synchronization with a clock signal, and a plurality of the acquired signals are subjected to logic operation AND.

8. The control method for DC-DC converters, according to claim 6 , wherein that the predetermined voltage level is higher than the maximum level and that the predetermined voltage level is lower than the minimum level are alternately detected.

Assignments (10)
MERGER Recorded Nov 14, 2025
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 073571/0456 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036038/0620 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021998/0645 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2006
From: NATSUME, MASAHIRO
To: FUJITSU LIMITED
Reel/Frame 017427/0936 →