Data processing method and circuit for data recording and reproducing and data recording and reproducing apparatus
View Patent ↗Embodiments of the invention a signal processing method capable of realizing low decoding error ratio by using a simple configuration free from unnecessary redundant bits. In one embodiment, user data (512 bytes+additional data) input to an input terminal is RLL-encoded by a RLL encoder 1 . The data from the RLL encoder — 1 is entered into a symbol error correction encoder where 9-bit symbol encoding is done. Its RS code portion is RLL-encoded by a RLL encoder — 2 . Signal read from a magnetic disk is entered into a RLL decoder — 2 where the RS code portion is RLL-decoded. The signal from the RLL decoder — 2 is then entered into a symbol error correction decoder where random read/write errors, burst errors attributable to defects and other errors are corrected to produce a (user data+RLL) signal. This data is output to an output terminal after being decoded by a RLL decoder — 1.
1. A data recording and reproducing processing method in which input data is encoded and recorded on a recording medium in units of J (J: positive integer) blocks each containing 512 bytes of input data with additional data and original data is reproduced from a read signal, comprising:
RLL (Run length Limited)-encoding of the input data;
algebraic-geometric encoding by which the RLL-encoded data is interleaved with J algebraic-geometric code symbols each composed of 9 bits; and
RLL-encoding of the J algebraic-geometric code symbols.
2. A data recording and reproducing processing method according to claim 1 , wherein the algebraic-geometric encoding is such that Reed Solomon (RS) error detection/correction code symbols each composed of 9 bits are added to the RLL-encoded data.
3. A data recording and reproducing processing method according to claim 1 , wherein the algebraic-geometric encoding is such that expanded (extended) Reed Solomon (RS) error detection/correction code symbols each composed of 9 bits are added to the RLL-encoded data.
4. A data recording and reproducing processing method comprising:
RLL (Run Length Limited) encoding of data;
algebraic-geometric encoding of the RLL-encoded data with 9-bit symbols to produce an algebraic-geometric code portion;
RLL-encoding of the algebraic-geometric code portion;
recording the data on a recording medium;
RLL-decoding the algebraic-geometric code portion of read data;
error-correcting the read data by using the algebraic-geometric code; and
RLL-decoding the error-corrected read data to reproduce the data.
5. A data recording and reproducing processing method according to claim 4 , wherein the algebraic-geometric encoding is such that Reed Solomon (RS) error detection/correction code symbols each composed of 9 bits are added to the RLL-encoded data.
6. A data recording and reproducing processing method according to claim 4 , wherein the algebraic-geometric encoding is such that expanded (extended) Reed Solomon (RS) error detection/correction code symbols each composed of 9 bits are added to the RLL-encoded data.
7. A data recording and reproducing processing circuit comprising:
a first RLL (Run Length Limited) encoder by which input data is RLL-encoded;
a symbol error correction encoder by which algebraic-geometric encoding of the RLL-encoded data from the first RLL encoder is performed with 9-bit symbols to produce an algebraic-geometric code portion;
a second RLL encoder by which the algebraic-geometric code portion of the data from the symbol error correction encoder is RLL-encoded;
a second RLL decoder by which the algebraic-geometric code portion of data read from a recording medium is RLL-decoded;
a symbol error correction decoder by which error correction of the read data is performed by using the algebraic-geometric code; and
a first RLL decoder by which the error-corrected read data is RLL-decoded.
8. A data recording and reproducing processing circuit according to claim 7 , wherein the algebraic-geometric encoding is such that Reed Solomon (RS) error detection/correction code symbols each composed of 9 bits are added to the RLL-encoded data.
9. A data recording and reproducing processing circuit according to claim 7 , wherein the algebraic-geometric encoding is such that expanded (extended) Reed Solomon (RS) error detection/correction code symbols each composed of 9 bits are added to the RLL-encoded data.
10. A data recording and reproducing apparatus comprising:
a first RLL (Run Length Limited) encoder by which input data is RLL-encoded;
a symbol error correction encoder by which algebraic-geometric encoding of the RLL-encoded data from the first RLL encoder is performed with 9-bit symbols to produce an algebraic-geometric code portion;
a second RLL encoder by which the algebraic-geometric code portion of the data from the symbol error correction encoder is RLL-encoded;
a write head by which write data, output from the second RLL encoder, is recorded on a recording medium;
a read head by which data recorded on the recording medium is read;
a second RLL decoder by which the algebraic-geometric code portion of data read by said read head is RLL-decoded;
a symbol error correction decoder by which error correction of the read data is performed by using the algebraic-geometric code; and
a first RLL decoder by which the error-corrected read data is RLL-decoded.
11. A data recording and reproducing apparatus according to claim 10 , wherein the algebraic-geometric encoding is such that Reed Solomon (RS) error detection/correction code symbols each composed of 9 bits are added to the RLL-encoded data.
12. A data recording and reproducing apparatus according to claim 10 , wherein the algebraic-geometric encoding is such that expanded (extended) Reed Solomon (RS) error detection/correction code symbols each composed of 9 bits are added to the RLL-encoded data.