Flat panel display device including electrostatic discharge prevention units
A flat panel display device includes a plurality of data lines spaced apart from each other on a substrate, power supply lines, and scan lines crossing the data lines and supply lines. First and second thin film transistors are each formed on the substrate and include a semiconductor layer, a gate insulation film, a gate electrode, a source electrode, and a drain electrode. At least one capacitor has a first electrode and a second electrode, and the first electrode is connected to the source or drain electrode of the first or second thin film transistor. An organic layer includes at least a light-emitting layer coupled to the second thin film transistor. An electrostatic discharge prevention unit is installed at an end the plurality of scan lines.
1. A flat panel display device comprising:
a plurality of data lines extending in a first direction and spaced apart from one another on a substrate;
a plurality of power supply lines extending in the first direction and spaced apart from one another;
a plurality of scan lines extending in a second direction perpendicular to the first direction to cross the data line and the power supply line, the scan line being spaced apart from one another;
at least two thin film transistors each on the substrate and including a semiconductor layer, a gate insulation film, a gate electrode, a source electrode, and a drain electrode;
at least one capacitor having a first electrode and a second electrode, the first electrode connected to the source electrode or the drain electrode of one of the thin film transistors;
an organic layer comprising at least one light-emitting layer coupled to one of the thin film transistors; and
an electrostatic discharge prevention unit positioned at a terminal portion of at least one of the plurality of scan lines,
wherein the electrostatic discharge prevention unit comprises cusps that are in contact with each other.
2. The flat panel display device according to claim 1 , wherein at least one of the film transistors is a switching transistor.
3. The flat panel display device according to claim 1 , wherein at least one of the thin film transistors is a driving transistor.
4. The flat panel display device according to claim 2 , wherein the gate electrode of the at least one thin film transistor is connected to one of the scan lines.
5. The flat panel display device according to claim 3 , wherein the at least one thin film transistor is connected to one of the power supply lines.
6. The flat panel display device according to claim 3 , wherein the gate electrode of the at least one thin film transistor is connected to the first electrode of the capacitor.
7. The flat panel display device according to claim 3 , wherein the at least one thin film transistor is connected to the second electrode of the capacitor.
8. The flat panel display device according to claim 1 , wherein at least one of the semiconductor layers of the thin film transistors comprises a low temperature polycrystalline silicon layer.
9. The flat panel display device according to claim 1 , wherein the cusps overlap each other by approximately 0.2 μm.
10. The flat panel display device according to claim 1 , wherein the cusps cross each other at a crossed region, and a width of a part at the crossed region is thinner than at least one of the gate insulation films of the thin film transistors.
11. The flat panel display device according to claim 1 :
wherein at least one of the scan lines comprises an elongated rectangular trace having at least two terminal portions; and
wherein the electrostatic discharge unit is positioned at one of the at least two terminal portions of the elongated rectangular trace.
12. The flat panel display device according to claim 1 :
wherein the cusps comprise a first cusp having a first point and a second cusp having a second point; and
wherein the first point is in physical contact with the second point.