IP Library Granted Patent US 7,173,835
Granted Patent B1
US 7,173,835 · App. 11/281,050 · Granted Feb 6, 2007

Control circuit associated with saturable inductor operated as synchronous rectifier forward power converter

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Quick Facts
Patent No.
US 7,173,835
App. No.
11/281,050
Granted
Feb 6, 2007
Kind
B1
Abstract

A circuit for synchronous rectifying is provided for forward power converter. A secondary winding of a transformer includes a first terminal and a second terminal for generating a switching voltage. A saturable inductor is coupled from the second terminal to a third terminal for providing a delay time. A first transistor is coupled from the first terminal to a ground terminal. A second transistor is connected from the third terminal to the ground terminal. The first and second transistors operate as synchronous rectifiers. An inductor is equipped from the third terminal to an output terminal of the forward power converter. Furthermore, a current-sensing device generates a current signal in response to an inductor current of the inductor. A control circuit receives the switching voltage and the current signal for generating a plurality of signals for driving a plurality of transistors, respectively.

Claims (52)

1. A circuit for synchronous rectifying of a power converter, comprising:

a transformer, having a primary winding and a secondary winding, wherein said secondary winding of said transformer includes a first terminal and a second terminal, wherein a switching voltage is produced across said second terminal and said first terminal of said secondary winding of said transformer as said transformer is being switched;

a saturable inductor, coupled from said transformer to a third terminal;

a first transistor, coupled from said transformer to a ground terminal;

a second transistor, coupled from said third terminal to said ground terminal;

an inductor, coupled from said third terminal to an output terminal of said power converter;

a current-sensing device, generating a current signal in response to an inductor current of said inductor; and

a control circuit, operating to receive said switching voltage and said current signal for generating a first control signal and a second control signal for driving said first transistor and said second transistor, respectively; wherein said first transistor is switched on in response to said switching voltage, and said second transistor is switched off in response to said current signal;

wherein said saturable inductor provides a delay time to inhibit a current flow from said transformer to said second transistor when said switching voltage is being generated.

2. The circuit for synchronous rectifying of claim 1 , further comprising a diode connected from said control circuit to said second transistor for detecting a voltage of said second transistor.

3. The circuit for synchronous rectifying of claim 1 , wherein said first control signal is enabled after said switching voltage is higher than a first threshold; said first control signal is disabled once said switching voltage is lower than a second threshold; said second control signal is enabled once a voltage of said second transistor is lower than a fourth threshold; and said second control signal is disabled as long as said current signal is lower than a fifth threshold and said switching voltage is higher than said second threshold.

4. The circuit for synchronous rectifying of claim 1 , wherein said first control signal is enabled after said switching voltage is higher than a first threshold; said first control signal is disabled once said switching voltage is lower than a second threshold; said second control signal is enabled once a voltage of said second transistor is lower than a fourth threshold; said second control signal is disabled as long as said current signal is lower than a fifth threshold or said switching voltage is higher than said second threshold.

5. The circuit for synchronous rectifying of claim 1 , wherein said control circuit comprises:

a first comparator, having a positive input coupled to said second terminal of said secondary winding of said transformer via a first threshold, a negative input of said first comparator being coupled to said first terminal of said secondary winding of said transformer;

a second comparator, having a positive input coupled to said second terminal of said secondary winding of said transformer via a second threshold, a negative input of said second comparator being coupled to said first terminal of said secondary winding of said transformer;

a third comparator, having a positive input coupled to said first terminal of said secondary winding of said transformer via a third threshold, a negative input of said third comparator being coupled to said second terminal of said secondary winding of said transformer;

a fourth comparator, having a positive input coupled to a fourth threshold, a negative input of said fourth comparator being coupled to said third terminal, wherein a current source is coupled to said negative input of said fourth comparator;

a fifth comparator, having a positive input coupled to a fifth threshold, a negative input of said fifth comparator receiving said current signal;

a first flip flop, generating said first control signal, wherein said first comparator enables said first control signal and said second comparator disables said first control signal; and

a second flip flop, generating said second control signal, wherein said second control signal is enabled by said third comparator and said fourth comparator, said second control signal being disabled by said second comparator or said fifth comparator.

6. The circuit of synchronous rectifier of claim 1 , wherein said control circuit further comprising an exclusive circuit for ensuring said second control signal being disabled before said first control signal being enabled, and for ensuring said first control signal is disabled before said second control signal being enabled.

7. A circuit of synchronous rectifier of a power converter, comprising:

a first transistor, coupled to a secondary winding of a transformer;

a second transistor, coupled to said first transistor;

a saturable inductor, connected in series with said secondary winding of said transformer; wherein a switching voltage is produced across said secondary winding as said transformer is being switched;

an inductor, coupled to said second transistor and an output terminal of said power converter;

a current-sensing device, generating a current signal in response to an inductor current of said inductor; and

a control circuit, operating to receive said switching voltage and said current signal for generating a first control signal and a second control signal for driving said first transistor and said second transistor, respectively.

8. The circuit of synchronous rectifier of claim 7 , further comprising a diode connected from said control circuit to said second transistor for detecting a voltage of said second transistor.

9. The circuit of synchronous rectifier of claim 7 , wherein said saturable inductor provides a delay time for inhibiting a current flow from said secondary winding of said transformer to said second transistor when said switching voltage is generated.

10. The circuit of synchronous rectifier as claimed in claim 7 , wherein said first control signal is enabled after said switching voltage is higher than a first threshold; said first control signal is disabled once said switching voltage is lower than a second threshold; said second control signal is enabled once a voltage of said second transistor is lower than a fourth threshold; and said second control signal is disabled as long as said current signal is lower than a fifth threshold and said switching voltage is higher than said second threshold.

11. The circuit of synchronous rectifier of claim 7 , wherein said first control signal is enabled after said switching voltage is higher than a first threshold; said first control signal is disabled once said switching voltage is lower than a second threshold; said second control signal is enabled once a voltage of said second transistor is lower than a fourth threshold; and said second control signal is disabled as long as said current signal is lower than a fifth threshold or said switching voltage is higher than said second threshold.

12. The circuit of synchronous rectifier of claim 7 , wherein said control circuit comprising:

a first comparator, having a positive input coupled to a second terminal of said secondary winding of said transformer via a first threshold, a negative input of said first comparator being coupled to a first terminal of said secondary winding of said transformer;

a second comparator, having a positive input coupled to said second terminal of said secondary winding of said transformer via a second threshold, a negative input of said second comparator being coupled to said first terminal of said secondary winding of said transformer;

a third comparator, having a positive input coupled to said first terminal of said secondary winding of said transformer via a third threshold, said negative input of said third comparator being coupled to second terminal of said secondary winding of said transformer;

a fourth comparator, having a positive input coupled to a fourth threshold, a negative input of said fourth comparator being coupled to said second transistor, wherein a current source is coupled to the negative input of the fourth comparator;

a fifth comparator, having a positive input coupled to said fifth threshold, a negative input of said fifth comparator being coupled for receiving said current signal;

a first flip flop, generating said first control signal, wherein said first control signal is enabled by said first comparator and said first control signal is disabled by said second comparator; and

a second flip flop, generating said second control signal, wherein said second control signal is enabled by said third comparator and the fourth comparator, said second control signal being disabled by said second comparator or said fifth comparator.

13. The circuit of synchronous rectifier of claim 7 , wherein said control circuit further comprising an exclusive circuit for ensuring said second control signal being disabled before said first control signal is enabled, and for ensuring said first control signal being disabled before said second control signal is enabled.

14. A synchronous rectifying circuit of a power converter, comprising:

a first switch, coupled to a secondary winding of a transformer;

a second switch, coupled to said first switch;

a saturable inductor, connected in series with said secondary winding of said transformer; wherein a switching voltage is produced across said secondary winding as said transformer is being switched;

an inductor, coupled to an output terminal of said power converter;

a current-sensing device, generating a current signal in response to an inductor current of said inductor; and

a control circuit, coupled to receive said switching voltage and said current signal for generating a first control signal and a second control signal for driving said first switch and said second control switch, respectively.

15. The synchronous rectifying circuit of claim 14 , wherein said control circuit is coupled to said second switch for detecting a voltage of said second switch.

16. The synchronous rectifying circuit of claim 14 , wherein said saturable inductor inhibits an instant current flowing from said secondary winding of said transformer to said second switch.

17. The synchronous rectifying circuit of claim 14 , wherein said first control signal is enabled after said switching voltage is higher than a first threshold; said first control signal is disabled once said switching voltage is lower than a second threshold; said second control signal is enabled once a voltage of said second switch is lower than a fourth threshold; and said second control signal is disabled as long as said current signal is lower than a fifth threshold and said switching voltage is higher than said second threshold.

18. The synchronous rectifying circuit of claim 14 , wherein said first control signal is enabled after said switching voltage is higher than a first threshold; said first control signal is disabled once said switching voltage is lower than a second threshold; said second control signal is enabled once a voltage of said second switch is lower than a fourth threshold; and said second control signal is disabled as long as said current signal is lower than a fifth threshold or said switching voltage is higher than said second threshold.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RECORDED AT REEL 046410, FRAME 0933 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046410/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2017
From: FAIRCHILD (TAIWAN) CORPORATION (FORMERLY SYSTEM GENERAL CORPORATION)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 042328/0318 →
CHANGE OF NAME Recorded Jun 8, 2016
From: SYSTEM GENERAL CORP.
To: FAIRCHILD (TAIWAN) CORPORATION
Reel/Frame 038906/0030 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2005
From: YANG, TA-YUNG
To: SYSTEM GENERAL CORP.
Reel/Frame 017231/0348 →