Pixel and light emitting display using the same
View Patent ↗A pixel capable of displaying a uniform image in spite of process variation is disclosed. The pixel includes an organic light emitting diode display (OLED), a first transistor for controlling current that flows from a first power source to the OLED in response to a data signal, a second transistor connected between an nth (n is a natural number) scan line and a data line to supply the data signal on the data line to the first transistor when a scan signal is supplied to the nth scan line, a storage capacitor connected to the gate terminal of the first transistor to store the voltage corresponding to the data signal, and a third transistor formed to have a conductivity type different from the conductivity type of the first and/or second transistors and connected to the (n−1)th scan line so as to be turned on when the scan signal is supplied to the (n−1)th scan line. Therefore, it is possible to prevent leakage current from being generated due to process variation and to thus display an image with desired brightness.
1. A pixel comprising:
an organic light emitting diode (OLED);
a first transistor configured to control current from a first power source to the OLED according to a data signal;
a second transistor configured to selectively connect the data signal to the first transistor according to a first scan signal on an nth (where n is a natural number) scan line;
a capacitor connected to the gate terminal of the first transistor configured to store a voltage corresponding to the data signal; and
a third transistor having a conductivity type different from the conductivity types of at least one of the first and second transistors, the third transistor being diode connected to an (n−1)th scan line and configured to be turned on when a second scan signal is supplied to the (n−1)th scan line.
2. The pixel according to claim 1 ,
wherein the conductivity type of at least one of the first and second transistors is PMOS, and the conductivity type of the third transistor is NMOS.
3. The pixel according to claim 1 , wherein the third transistor, when on, is configured to supply the gate terminal of the first transistor and the capacitor with a voltage corresponding to the second scan signal.
4. The pixel according to claim 1 , wherein the voltage of the scan signal is lower than the voltage of the data signal.
5. The pixel according to claim 1 , wherein an off voltage is supplied to the second transistor when the scan signal is supplied to the (n−1)th scan line, and wherein the value of the off voltage is equal to or higher than the voltage of the data signal.
6. The pixel according to claim 1 , further comprising a fourth transistor connected to the first transistor such that the first transistor performs as a diode when the scan signal is supplied to the nth scan line.
7. The pixel according to claim 6 , further comprising an additional one or more transistors forming a selectively conductive current path from the first power source, through the first transistor, and to the OLED, the additional one or more transistors being connected to emission control lines.
8. The pixel according to claim 7 , wherein the emission control lines are configured to carry emission control signals, and the additional one or more transistors are configured to conduct current according to the emission control signals.
9. The pixel according to claim 1 , wherein the voltage corresponding to the data signal also corresponds to the voltage threshold of the first transistor.
10. The pixel according to claim 1 , wherein the gate terminal of the first transistor is connected to the gate terminal and a first terminal of the third transistor.
11. The pixel according to claim 1 , wherein the third transistor is configured to initialize a voltage based on the second scan signal.
12. A pixel comprising:
an OLED;
a second transistor having a first terminal connected to a data tine and having a gate terminal connected to an nth (n is a natural number) scan tine;
a first transistor having a first terminal connected to the second terminal of the second transistor;
a third transistor having a first terminal and a gate terminal each connected to the gate terminal of the first transistor and having a second terminal connected to an (n−1)th scan line;
a fourth transistor connected between the gate terminal and the second terminal of the first transistor and having a gate terminal connected to the nth scan line;
a fifth transistor connected between a first power source and the first terminal of the first transistor and having a gate terminal connected to an emission control line; and
a sixth transistor connected between the second terminal of the first transistor and the OLED and having a gate terminal connected to the emission control line,
wherein the third transistor is formed to have a conductivity type different from the conductivity type of the first transistor.
13. The pixel according to claim 12 ,
wherein the conductivity type of the first transistor is PMOS, and
wherein the conductivity type of the third transistor is NMOS.
14. A light emitting display comprising:
a data driver configured to supply a plurality of data signals to a plurality of data lines;
a scan driver configured to sequentially supply a plurality of scan signals to a plurality of scan lines and to supply an off voltage to the scan lines during periods when the scan signals are not supplied, wherein the off voltage has a value greater than the value of the voltage of the data signals; and
an image display comprising a plurality of pixels connected to one or more of the data lines and to one or more of the scan lines,
wherein each of the pixels comprises one or more transistors and a first of the one or more transistors is of a first conductivity type and a second of the one or more transistors is of a second conductivity type, and
wherein a third of the one or more transistors is connected to an nth (n is a natural number) scan line and a fourth of the one or more transistors is diode connected to an (n−1)th scan line.
15. The display according to claim 14 , wherein the first conductivity type is PMOS and the second conductivity type is NMOS.
16. The display according to claim 14 , wherein each of the pixels comprises:
an OLED;
a first transistor configured to control current from a first power source to the OLED according to a data signal;
a second transistor configured to selectively connect the data signal to the first transistor according to a first scan signal on an nth (n is a natural number) scan line;
a capacitor connected to the gate terminal of the first transistor configured to store a voltage corresponding to the data signal; and
a third transistor configured to have a conductivity type different from the conductivity types of at least one of the first and second transistors, the third transistor being connected to the (n−1)th scan line and configured to be turned on when a second scan signal is supplied to the (n−1)th scan line,
17. The display according to claim 16 ,
wherein the conductivity type of at least one of the first and second transistors is PMOS, and
wherein the conductivity type of the third transistor is NMOS.
18. The display according to claim 16 , further comprising a fourth transistor connected to the first transistor such that current flows through the first transistor and such that the first transistor performs as a diode when the scan signal is supplied to the nth scan line.
19. The display according to claim 18 , further comprising an additional one or more transistors forming a selectively conductive current path from the first power source, through the first transistor, and to the OLED, the additional one or more transistors being controlled by emission control lines.
20. The pixel according to claim 16 , wherein the third transistor is configured to initialize a voltage based on the second scan signal.