IP Library Granted Patent US 7,647,544
Granted Patent B1
US 7,647,544 · App. 11/284,450 · Granted Jan 12, 2010

Disk drive implementing data path protection without writing the error detection code data to the disk

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Quick Facts
Patent No.
US 7,647,544
App. No.
11/284,450
Granted
Jan 12, 2010
Kind
B1
Abstract

A disk drive is disclosed comprising a disk, a buffer memory, and control circuitry operable to receive a write command from a host, wherein the write command comprises write data and a write data address. Write EDC data is generated in response to the write data and the write data address, wherein the write data and the write EDC data are stored in the buffer memory. The write data is read from the buffer memory, and write check data is generated in response to the write data and the write data address. The write EDC data is read from the buffer memory and compared to the write check data to detect a write error. If the write error is not detected, the write data is written to the disk without writing the write EDC data to the disk.

Claims (84)

1. A disk drive comprising:

(a) a disk comprising a plurality of data tracks, wherein each data track comprises a plurality of data sectors;

(b) a buffer memory; and

(c) control circuitry operable to:

receive a write command from a host, wherein the write command comprises write data and a write data address;

generate write error detection code (EDC) data in response to the write data and the write data address;

store the write data and the write EDC data in the buffer memory;

read the write data from the buffer memory and generate write check data in response to the write data and the write data address;

read the write EDC data from the buffer memory and compare the write EDC data to the write check data to detect a write error; and

if the write error is not detected, write the write data to the disk without writing the write EDC data to the disk.

2. The disk drive as recited in claim 1 , wherein the write data address comprises an absolute block address.

3. The disk drive as recited in claim 1 , wherein the write data address comprises a logical block address.

4. The disk drive as recited in claim 1 , wherein the control circuitry is further operable to:

receive a read command from the host;

read data from at least one of the data sectors in response to a read data address associated with the read command;

generate read EDC data in response to the read data and the read data address;

store the read data and the read EDC data in the buffer memory;

read the read data from the buffer memory and generate read check data in response to the read data and the read data address; and

read the read EDC data from the buffer memory and compare the read EDC data to the read check data to detect a read error.

5. The disk drive as recited in claim 4 , wherein the control circuitry is further operable to transmit the read data from the buffer memory to the host if the read error is not detected.

6. A disk drive comprising:

(a) a disk comprising a plurality of data tracks, wherein each data track comprises a plurality of data sectors;

(b) a buffer memory; and

(c) control circuitry operable to:

receive a write command from a host, wherein the write command comprises write data and host generated error detection code (EDC) data generated in response to the write data; and

write the write data to the disk without writing the host generated EDC data to the disk.

7. The disk drive as recited in claim 6 , wherein:

(a) the write command further comprises a write data address identifying at least one of the data sectors for storing the write data; and

(b) the host generated EDC data is further generated in response to the write data address.

8. The disk drive as recited in claim 7 , wherein the control circuitry is further operable to:

store the write data and the host generated EDC data in the buffer memory;

read the write data from the buffer memory and generate write check data in response to the write data and the write data address; and

read the host generated EDC data from the buffer memory and compare the host generated EDC data to the write check data to detect a write error.

9. The disk drive as recited in claim 6 , wherein the control circuitry is further operable to:

receive a read command from the host;

read data from the disk in response to the read command;

generate EDC data in response to the read data; and

transmit the read data and the control circuitry generated EDC data to the host.

10. The disk drive as recited in claim 9 , wherein the control circuitry is further operable to:

store the read data and the control circuitry generated EDC data in the buffer memory;

read the read data from the buffer memory and generate read check data in response to the read data; and

read the control circuitry generated EDC data from the buffer memory and compare the control circuitry generated EDC data to the read check data to detect a read error.

11. The disk drive as recited in claim 10 , wherein:

(a) the read command further comprises a read data address identifying at least one of the data sectors for storing the read data; and

(b) the read check data is further generated in response to the read data address.

12. A method of operating a disk drive, the disk drive comprising a disk comprising a plurality of data tracks, wherein each data track comprises a plurality of data sectors, and a buffer memory, the method comprising the steps of:

receiving a write command from a host, wherein the write command comprises write data and a write data address;

generating write error detection code (EDC) data in response to the write data and the write data address;

storing the write data and the write EDC data in the buffer memory;

reading the write data from the buffer memory and generating write check data in response to the write data and the write data address;

reading the write EDC data from the buffer memory and comparing the write EDC data to the write check data to detect a write error; and

if the write error is not detected, writing the write data to the disk without writing the write EDC data to the disk.

13. The method as recited in claim 12 , wherein the write data address comprises an absolute block address.

14. The method as recited in claim 12 , wherein the write data address comprises a logical block address.

15. The method as recited in claim 12 , further comprising the steps of:

receiving a read command from the host;

reading data from at least one of the data sectors in response to a read data address associated with the read command;

generating EDC data in response to the read data and the read data address;

storing the read data and the EDC data in the buffer memory;

reading the read data from the buffer memory and generating read check data in response to the read data and the read data address; and

reading the EDC data from the buffer memory and comparing the EDC data to the read check data to detect a read error.

16. The method as recited in claim 15 , further comprising the step of transmitting the read data from the buffer memory to the host if the read error is not detected.

17. A method of operating a disk drive, the disk drive comprising a disk comprising a plurality of data tracks, wherein each data track comprises a plurality of data sectors, and a buffer memory, the method comprising the steps of:

receiving a write command from a host, wherein the write command comprises write data and host generated error detection code (EDC) data generated in response to the write data; and

writing the write data to the disk without writing the host generated EDC data to the disk.

18. The method as recited in claim 17 , wherein:

the write command further comprises a write data address identifying at least one of the data sectors for storing the write data; and

the host generated EDC data is further generated in response to the write data address.

19. The method as recited in claim 18 , further comprising the steps of:

storing the write data and the host generated EDC data in the buffer memory;

reading the write data from the buffer memory and generating write check data in response to the write data and the write data address; and

reading the host generated EDC data from the buffer memory and comparing the host generated EDC data to the write check data to detect a write error.

20. The method as recited in claim 17 , further comprising the steps of:

receiving a read command from the host;

reading data from the disk in response to the read command;

generating EDC data in response to the read data; and

transmitting the read data and the EDC data to the host.

21. The method as recited in claim 20 , further comprising the steps of:

storing the data and the EDC data in the buffer memory;

reading the read data from the buffer memory and generating read check data in response to the read data; and

reading the EDC data from the buffer memory and comparing the EDC data to the read check data to detect a read error.

22. The method as recited in claim 21 , wherein:

the read command further comprises a read data address identifying at least one of the data sectors for storing the read data; and

the read check data is further generated in response to the read data address.

Assignments (6)
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2005
From: MASIEWICZ, JOHN C.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 017274/0087 →