LCD device including semiconductor of nano material and method for fabricating the same
View Patent ↗An LCD device and a method for fabricating the same are disclosed. The LCD device includes a substrate having a pixel region. A gate electrode is formed in the pixel region. A gate insulating film is formed on the substrate including the gate electrode. A conducting layer is formed on the substrate including the gate insulating film. A semiconductor layer containing a nanosemiconductor material is formed on the conducting layer above the gate electrode. Source and drain electrodes overlap opposing sides of the semiconductor layer. A passivation layer is formed on the substrate including the source and drain electrodes. A first contact hole in the passivation layer exposes the drain electrode. A pixel electrode in the pixel region is connected to the drain electrode through the first contact hole.
1. A method for fabricating an LCD device including semiconductor of nano material comprising:
providing a thin film transistor (TFT) substrate having a pixel region;
forming a gate electrode of a thin film transistor (TFT) in the pixel region;
forming a gate insulating film on the gate electrode on the substrate;
forming a conducting layer on the gate insulating film;
altering a portion of the conducting layer such that the portion has a potential of a first polarity,
wherein altering the portion of the conducting layer comprises:
aligning a mold such that a conductive pattern on the mold is aligned above the portion of the conducting layer which corresponds to the thin film transistor (TFT),
adjusting a relative position of the mold and the substrate such that the conductive pattern directly contacts the portion of the conducting layer corresponding to the thin film transistor (TFT),
applying an electric signal between the conductive pattern and the substrate to provide the potential of the first polarity to the portion of the conducting layer,
wherein the electric signal is generated between the conductive pattern and ground, and wherein the substrate is connected to ground; and
separating the mold from the portion of the conducting layer subsequent to applying the electric field;
wherein the electric signal is generated by electric means;
wherein one electrode of the electric means is connected to the conductive pattern, and the other electrode of the electric means is connected to a ground;
wherein the substrate is connected to the ground;
forming a semiconductor layer on the portion of the conducting layer by dipping the whole substrate having the conducting layer in a solution contained in a water tank so that the conducting layer is perfectly immersed in the solution,
wherein the solution contains a plurality of nano tubes having a second polarity opposite to the first polarity, wherein the semiconductor layer forms a channel region of the TFT;
wherein each nanotube includes a semiconductor material and an insulating material surrounding an outer surface of the semiconductor material;
wherein the semiconductor material has a shape of cylinder;
forming source and drain electrodes at opposing sides of the semiconductor layer;
forming a passivation layer on the substrate including the source and drain electrodes;
partially removing the passivation layer to form a first contact hole that exposes the drain electrode: and
forming a pixel electrode in the pixel region, the pixel electrode connected to the drain electrode through the first contact hole.
2. The method according to claim 1 , wherein the conducting layer comprises a ferroelectric material.
3. The method according to claim 1 , further comprising:
forming a first storage electrode on the substrate corresponding to a storage region of the substrate; and
forming a second storage electrode on the conducting layer to overlap the first storage electrode, the second storage electrode electrically connected to the pixel electrode through a second contact hole that passes through the passivation layer.
4. The method according to claim 1 , further comprising forming an ohmic contact layer between the semiconductor layer and the source and drain electrodes.
5. The method according to claim 1 , wherein the gate electrode is disposed between the semiconductor layer and the substrate.