IP Library Granted Patent US 7,368,895
Granted Patent B2
US 7,368,895 · App. 11/289,587 · Granted May 6, 2008

Apparatus for a power supply with brownout protection and the protecting method for the same

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,368,895
App. No.
11/289,587
Granted
May 6, 2008
Kind
B2
Abstract

An apparatus for a power supply with brownout protection and the method thereof are proposed. As a brownout condition occurs, the apparatus informs at least one microprocessor to process the shutdown process timely. The apparatus includes a power factor correction (PFC) circuit, and a bus capacitor generating a bus voltage by receiving an input voltage via the PFC circuit, and a PWM circuit generating multiple output voltages for the microprocessor, and a supervisor circuit generating a power-good signal in response to a proportional bus voltage, and a brownout circuit for disabling the boosting operation of the PFC circuit under a brownout condition. When the boosting operation is disabled, the bus voltage starts to fall. As the proportional bus voltage is lower than a threshold voltage, the supervisor circuit generates the power-good signal. Therefore, the microprocessor can process the shutdown procedure timely.

Claims (16)

1. An apparatus for a power supply with brownout protection, comprising:

a PFC circuit, receiving an input voltage for performing a power factor correction and a voltage boosting operation to increase said input voltage to a bus voltage, wherein said bus voltage is greater than said input voltage;

a bus capacitor, connected to an output terminal of said PFC circuit, wherein said bus capacitor is charged to a magnitude of said bus voltage;

a PWM circuit having an input coupled to said bus capacitor and an output coupled to a microprocessor, said PWM circuit generating at least one output voltage at said output thereof in response to the bus voltage;

a supervisor circuit having a first input coupled to said bus capacitor to detect a proportional bus voltage, a second input coupled to said output of said PWM circuit to monitor said at least one output voltage thereof, and an output connected to said microprocessor, said supervisor circuit outputting at least one power-good signal to said microprocessor said proportional bus voltage being less than a threshold voltage, said supervisor circuit outputting said at least one power-good signal preceding a reduction in said output voltage of said PWM circuit due to a reduction in said bus voltage during a brownout condition; and

a brownout circuit, coupled between said input voltage and said PFC circuit, said brownout circuit disabling said voltage boosting operation of said PFC circuit responsive to detection of the brownout condition and thereby reduce said bus voltage, wherein once said at least one power-good signal is output to the microprocessor, the microprocessor process a shutdown procedure.

2. The apparatus of claim 1 , wherein said supervisor circuit comprises a comparator having an output driving a transistor.

3. The apparatus of claim 2 , wherein said comparator is a hysteresis comparator.

4. A protecting method for a power supply with brownout protection, wherein the power supply has a PFC circuit, as a brownout condition occurs, at least one microprocessor is controlled to process a shutdown procedure, said method comprising the steps of:

judging if an input voltage is lower than a protection voltage;

disabling a voltage boosting operation of the PFC circuit responsive to the input voltage being judged lower than the protection voltage to lower a bus voltage output from the PFC circuit;

judging if a proportional bus voltage is lower than a threshold voltage; and

controlling a power-good signal output to the microprocessor to initiate the shutdown procedure when the proportional bus voltage is lower than the threshold voltage and preceding a reduction in an output voltage supplied to the microprocessor.

5. The method of claim 4 , wherein the step of judging if the proportional bus voltage is lower than a threshold voltage is processed via a supervisor circuit.

6. The method of claim 4 , wherein the step of controlling a power-good signal output to the microprocessor to initiate the shutdown procedure is processed by a supervisor circuit.

7. The method of claim 4 , wherein the step of judging if an input voltage is lower than a protection voltage and the step of disabling the boosting operation of the PFC circuit are processed by a brownout circuit.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RECORDED AT REEL 046410, FRAME 0933 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046410/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2017
From: FAIRCHILD (TAIWAN) CORPORATION (FORMERLY SYSTEM GENERAL CORPORATION)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 042328/0318 →
CHANGE OF NAME Recorded May 3, 2016
From: SYSTEM GENERAL CORPORATION
To: FAIRCHILD (TAIWAN) CORPORATION
Reel/Frame 038599/0043 →