Multiplexed voltage reference strategy for codec
View Patent ↗A shared voltage reference circuit for a codec is shown that includes a voltage reference circuit for producing a reference voltage. A first sample and hold circuit has a first capacitor coupled to an output of the voltage reference circuit through a first switch controlled by a first phase of a sample clock signal for the codec. A second sample and hold circuit has a second capacitor coupled to the output of the voltage reference circuit through a second switch controlled by a second phase of the sample clock signal. A clock generator circuit generates the first and second phases of the sample clock signal, where the first and second phases are non-overlapping.
1. A method for sharing a voltage reference in a codec circuit, the method comprising the steps of:
providing a voltage reference circuit having an output for producing a reference voltage;
connecting the output of the voltage reference circuit to a first capacitor through a first switch;
connecting the output of the voltage reference circuit to a second capacitor through a second switch;
driving the first switch with a first phase of a sample clock signal in order to charge the first capacitor to produce a sampled reference voltage for a digital to analog converter of the codec; and
driving the second switch with a second phase of the sample clock signal in order to charge the second capacitor to produce a sampled reference voltage for an analog to digital converter of the codec,
where the first and second phases of the sample clock are non-overlapping.
2. A shared voltage reference circuit for a codec, the circuit comprising:
a voltage reference circuit having an output for producing a reference voltage;
a first sample and hold circuit having a first capacitor coupled to the output of the voltage reference circuit through a first switch controlled by a first phase of a sample clock signal for the codec;
a second sample and hold circuit having a second capacitor coupled to the output of the voltage reference circuit through a second switch controlled by a second phase of the sample clock signal; and
a clock generator circuit for generating the first and second phases of the sample clock signal, where the first and second phases are non-overlapping.
3. A circuit for sharing a voltage reference in a codec circuit, the circuit comprising:
voltage reference means for producing a reference voltage;
first sample and hold means for sampling and holding the reference voltage responsive to a first phase of a sample clock signal to produce a first sampled reference voltage for an analog to digital converter of the codec;
second sample and hold means for sampling and holding the reference voltage responsive to a second phase of the sample clock signal to produce a second sampled reference voltage for a digital to analog converter of the codec;
clock generator means for generating the first and second phases of the sample clock signal, where the first and second phases of the sample clock are non-overlapping.