Metal layer in semiconductor device and method of forming the same
View Patent ↗Canting or falling of an upper metal line may be prevented by improving adhesion between an insulation layer and a metal layer. A method for forming a semiconductor which improves adhesion between an insulation layer and a metal layer includes: preparing a substrate formed with a lower metal layer; forming an insulation layer on the substrate; forming a plug after etching the insulation layer; performing a silicon ion implantation process from above the insulation layer; forming an upper metal layer on the insulation layer, the upper metal layer having a bottom layer of a Ti layer or a TiN layer; and siliciding a predetermined region of the bottom layer of the upper metal layer by heat treatment of the substrate.
1. A method of forming a metal layer in a semiconductor device, comprising:
forming a lower metal layer on a substrate;
forming an insulation layer on the lower metal layer;
etching the insulation layer;
forming a plug after etching the insulation layer;
performing a silicon ion implantation process from above the insulation layer;
forming an upper metal layer on the insulation layer, the upper metal layer having a bottom layer of a barrier metal; and
siliciding a predetermined region of the bottom layer by heat treatment of the substrate.
2. The method of claim 1 , wherein a Si-rich insulation layer is formed at an uppermost portion of the insulation layer by the silicon ion implantation process.
3. The method of claim 1 , wherein a silicon layer is formed on the insulation layer by the silicon ion implantation process.
4. The method of claim 2 , wherein a thickness of the Si-rich insulation layer is 1000-3000 Å, and an implantation depth of silicon ions by the silicon ion implantation process is 50-300 Å.
5. The method of claim 1 , wherein during the siliciding, silicon at a top of the insulation layer and barrier metal in the bottom layer of the upper metal layer mutually diffuse so as to form a metal silicide.
6. The method of claim 1 , wherein the siliciding is achieved by at least one of a rapid thermal process or a furnace annealing process.
7. The method of claim 6 , wherein the rapid thermal process is performed at a temperature of 100-500° C. for at least 10 seconds.
8. The method of claim 5 , wherein the barrier metal layer is formed as a Ti layer, a TiN layer, or a combination thereof.
9. The method of claim 8 , wherein the barrier metal layer is formed by sequentially forming a Ti layer having a thickness of 30-100 Å and a TiN layer having a thickness of 100-300 Å.
10. The method of claim 1 , wherein:
the silicon ion implantation process further forms an Si-rich insulation layer at an uppermost portion of the insulation layer or a silicon layer is formed on the insulation layer; and
the siliciding is performed such that silicon at a top of the insulation layer and titanium in the bottom layer of the upper metal layer mutually diffuses, so as to form a titanium silicide.
11. The method of claim 1 , wherein, forming an upper metal layer comprises sequentially depositing a lower Ti layer, a lower TiN layer, a conductive layer, an upper Ti layer, and an upper TiN layer.