IP Library › Granted Patent US 8,106,463
Granted Patent B2
US 8,106,463 · App. 11/296,029 · Granted Jan 31, 2012

Memory cells for read only memories

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,106,463
App. No.
11/296,029
Granted
Jan 31, 2012
Kind
B2
Abstract

A ROM memory cell has significantly less total area than previously known ROM memory cells. Instead of using only one layer in the manufacturing process to program the memory cells, at least two layers are used to program the memory cells. This flexibility allows the memory cell to be reduced in area, which in turn produces a ROM that is more area efficient and consequently lower in cost. As the bitline length and capacitance are reduced, the speed and power consumption are also improved.

Claims (20)

1. A 1-1 read-only memory cell containing two binary bits, the read-only memory cell comprising:

a substrate;

a predefined binary memory cell boundary overlain on the substrate;

a single diffusion island fabricated in the predefined binary memory cell boundary and upon the substrate; and

metal contacts formed upon the single diffusion island to define the predetermined binary contents of the memory cell,

wherein the single diffusion island extends outside the cell boundary and only the single diffusion island and the metal contacts are needed to realize the predetermined binary contents of the memory cell, wherein the 1-1 memory cell stores a binary value of 1-1.

2. The read-only memory cell of claim 1 , wherein the substrate is a p-type substrate.

3. The read-only memory cell of claim 1 , wherein the substrate is an n-type substrate.

4. A 1-0 read-only memory cell containing two binary bits, the read-only memory cell comprising:

a substrate;

a predefined binary memory cell boundary overlain on the substrate;

a single diffusion island fabricated in the predefined binary memory cell boundary and upon the substrate; and

metal contacts formed upon the single diffusion island to define the predetermined binary contents of the memory cell,

wherein the single diffusion island extends outside the cell boundary and only the single diffusion island and the metal contacts are needed to realize the predetermined binary contents of the memory cell, wherein the 1-0 memory cell stores a binary value of 1-1.

5. A 0-1 read-only memory cell containing two binary bits, the read-only memory cell comprising:

a substrate;

a predefined binary memory cell boundary overlain on the substrate;

a single diffusion island fabricated in the predefined binary memory cell boundary and upon the substrate; and

metal contacts formed upon the single diffusion island to define the predetermined binary contents of the memory cell,

wherein the single diffusion island extends outside the cell boundary and only the single diffusion island and the metal contacts are needed to realize the predetermined binary contents of the memory cell, wherein the 1-0 memory cell stores a binary value of 1-1.