IP Library Granted Patent US 7,518,437
Granted Patent B2
US 7,518,437 · App. 11/296,392 · Granted Apr 14, 2009

Constant current circuit and constant current generating method

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Quick Facts
Patent No.
US 7,518,437
App. No.
11/296,392
Granted
Apr 14, 2009
Kind
B2
Abstract

A constant current circuit and a constant current generating method, wherein when a voltage in substantially no temperature dependence is applied to an element to output a constant current, temperature dependence of the element can be cancelled. A current indicative of first temperature dependence, which is generated by applying a bias voltage in substantially no temperature dependence to a first current setting section, and a current indicative of second temperature dependence, which is generated by applying a bias voltage in substantially no temperature dependence to a second current setting section are added and outputted as a constant current in substantially no temperature dependence. When a bias voltage in substantially no temperature dependence is applied to a current setting section having resistive components to generate currents, even where the resistive components have temperature dependence, the first and second current setting sections having temperature dependence opposite to each other are parallel-connected and bias voltages are applied thereto, after which the generated currents are added together. Consequently, the temperature dependence contained in the individual current setting sections can be cancelled out and hence a constant current in substantially no temperature dependence can be outputted.

Claims (16)

1. A constant current circuit comprising:

a first current setting section of which temperature dependence of a path current indicates first temperature dependence; and

a second current setting section connected in parallel with the first current setting section and indicating second temperature dependence corresponding to temperature dependence opposite to the first temperature dependence; and

a bias applying section applying bias voltage in substantially no temperature dependence to a connection point of the first current setting section and the second current setting section,

wherein currents generated by the first current setting section and the second current setting section are added together and the result of addition is outputted through the bias applying section,

either one of the first and second current setting sections includes at least one MOS transistor on a first current path, and other one of the first and second current setting sections is configured so as to have a plurality of resistive elements connected in series on a second current path, and

a gate voltage of the at least one MOS transistor provided with either one of the first and second current setting sections is generated by dividing the bias voltage by the resistive elements,

wherein the bias applying section comprises:

a transistor having a source terminal connected to the connection point; and

an amplifier circuit receiving a reference voltage and the bias voltage at the connection point as input signals, the amplifier circuit adjusting controlling a control terminal of the transistor and adjusting the bias voltage at the connection point to the reference voltage.

2. The constant current circuit according to claim 1 , wherein

the at least one MOS transistor is configured in such a manner that temperature dependence of a drain current thereof is adjusted according to the gate voltage.

3. The constant current circuit according to claim 2 , wherein the first current setting section includes a first MOS transistor, which is one of the plurality of resistive elements, of which a gate voltage is applied in a region indicative of the first temperature dependence, and

the second current setting section includes a second MOS transistor, which is the at least one MOS transistor, of which the gate voltage is applied in a region indicative of the second temperature dependence.

4. The constant current circuit according to claim 3 , wherein the first current setting section includes a plurality of the first MOS transistors, which form the plurality of the resistive elements, connected in series, and

the gate voltage of the second MOS transistor is generated by dividing the bias voltage by the first MOS transistors.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036044/0745 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →