IP Library Granted Patent US 7,470,559
Granted Patent B2
US 7,470,559 · App. 11/297,973 · Granted Dec 30, 2008

Semiconductor component comprising a buried mirror

Assignees: STMicroelectronics SA; STMicroelectronics (Canada) Inc.
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Quick Facts
Patent No.
US 7,470,559
App. No.
11/297,973
Granted
Dec 30, 2008
Kind
B2
Abstract

A method for forming a buried mirror in a semiconductor component includes the steps of forming a structure comprising a semiconductor layer laid on an insulating layer covering a substrate; forming one or several openings in the semiconductor layer emerging at the surface of the insulating layer; eliminating a portion of the insulating layer, whereby a recess is formed; forming a second thin insulating layer against the wall of the recess; and forming a metal layer in the recess against the second insulating layer.

Claims (12)

1. A method for forming a buried mirror in a semiconductor component, comprising:

forming a structure comprising a semiconductor layer laid on an insulating layer covering a substrate;

forming one or several openings in the semiconductor layer emerging at the surface of the insulating layer;

eliminating a portion of the insulating layer, whereby a recess is formed;

forming a second thin insulating layer against the wall of the recess; and

forming a metal layer in the recess against the second insulating layer.

2. The method of claim 1 , wherein the second thin insulating layer has a thickness smaller than one quarter of the wavelength of the light likely to be reflected by the mirror.

3. The method of claim 1 , comprising, prior to the forming of the openings, the steps of:

etching the semiconductor layer, the insulating layer, and the upper portion of the substrate to form a trench surrounding said portion of the insulating layer; and

filling the previously-formed trench with a material different from said portion.

4. The method of claim 1 , wherein the substrate and the semiconductor layer are formed of single-crystal silicon, the insulating layer being formed of silicon oxide.

5. The method of claim 1 , wherein the metal layer is aluminum.

Assignments (2)
CHANGE OF NAME Recorded Jan 20, 2024
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 066357/0155 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2005
From: JOUAN, SEBASTIEN; MARTY, MICHEL
To: STMICROELECTRONICS SA; STMICROELECTRONICS(CANADA) INC.
Reel/Frame 017355/0585 →
Priority Claims (1)
FR 04 52900 · Dec 8, 2004 · national
Continuity (1)
Related Publication 20060118897A1 · Jun 8, 2006