IP Library Granted Patent US 8,120,077
Granted Patent B2
US 8,120,077 · App. 11/298,535 · Granted Feb 21, 2012

Solid-state imaging device comprising doped channel stop at isolation regions to suppress noise

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Quick Facts
Patent No.
US 8,120,077
App. No.
11/298,535
Granted
Feb 21, 2012
Kind
B2
Abstract

Capacitance between a detection capacitor and a reset transistor is the largest among the capacitances between the detection capacitor and transistors placed around the detection capacitor. In order to reduce this capacitance, it is effective to reduce the channel width of the reset transistor. It is possible to reduce the effective channel width by distributing, in the vicinity of the channel of the reset transistor and the boundary line between an active region and an element isolation region, ions which enhance the generation of carriers of an opposite polarity to the channel.

Claims (38)

1. A solid-state imaging device, comprising:

a semiconductor substrate;

a photodiode, formed on the semiconductor substrate, that performs photoelectric conversion of incident light into signal charge;

a transfer transistor, formed on the semiconductor substrate, that transfers the signal charge accumulated in the photodiode;

a detection capacitor, formed on the semiconductor substrate, that accumulates the signal charge transferred by the transfer transistor;

a reset transistor, formed on the semiconductor substrate, that discharges, into a drain, the signal charge accumulated in the detection capacitor; and

a trench isolation region, formed on the semiconductor substrate, that surrounds an active region of the photodiode, the transfer transistor, the detection capacitor and the reset transistor,

wherein ions are distributed in at least a first boundary between an active region directly below a gate electrode of the reset transistor and the trench isolation region, the ions enhancing generation of carriers of an opposite polarity to a polarity of carriers in a channel below the gate electrode of the reset transistor,

wherein the ions are distributed in at least the first boundary in a band having a width in a range of 0.05 μm and 0.20 μm, and

wherein the reset transistor has an effective gate width shorter than an effective gate length.

2. The solid-state imaging device according to claim 1 ,

wherein the ions enhancing the generation of the carriers of the opposite polarity to the polarity of the carriers in the channel below the gate electrode of the reset transistor are distributed seamlessly below the gate electrode of the reset transistor and adjacent to one of the detection capacitor and the drain.

3. The solid-state imaging device according to claim 1 ,

wherein an effective gate width of the reset transistor is between 0.01 μm to 0.4 μm, inclusive.

4. The solid-state imaging device according to claim 1 ,

wherein an effective gate length of the reset transistor is between 0.1 μm to 1.0 μm, inclusive.

5. The solid-state imaging device according to claim 1 ,

wherein the ions are distributed in a second boundary between an active region forming the photodiode and the trench isolation region, the ions enhancing generation of carriers of an opposite polarity to majority carriers of the photodiode.

6. The solid-state imaging device according to claim 5 ,

wherein the ions enhancing the generation of the carriers of the opposite polarity to the majority carriers are distributed in the second boundary, seamlessly with the ions distributed in the first boundary between the active region and the trench isolation region.

7. The solid-state imaging device according to claim 1 ,

wherein a plurality of photodiodes share one detection capacitor and one reset transistor,

wherein active regions of each photodiode of the plurality of photodiodes, the detection capacitor and the reset transistor are connected seamlessly, and

wherein the ions that enhance the generation of the carriers of the opposite polarity to the polarity of the carriers in the channel below the gate electrode of the reset transistor are distributed on sidewalls of the trench isolation region surrounding the active regions.

8. The solid-state imaging device according to claim 1 ,

wherein a plurality of photodiodes share one detection capacitor and one reset transistor,

wherein active regions of each photodiode of the plurality of photodiodes and the detection capacitor are connected seamlessly, while active regions of the plurality of photodiodes and an active region of the reset transistor are not directly connected, and

wherein the ions enhancing the generation of the carriers of the opposite polarity to the polarity of the carriers in a channel below the gate electrode of the reset transistor are distributed on each sidewall of the trench isolation region surrounding the active regions.

9. The solid-state imaging device according to claim 1 ,

wherein the effective gate width of the reset transistor is between 0.01 μm to 0.40 μm, inclusive, and an effective gate length of the reset transistor is between 0.10 μm to 1.00 μm, inclusive.

10. The solid-state imaging device according to claim 9 ,

wherein a plurality of photodiodes share one detection capacitor and one reset transistor,

wherein active regions of each photodiode of the plurality of photodiodes, the detection capacitor, and the reset transistor are connected seamlessly, and

wherein the ions that enhance the generation of the carriers of the opposite polarity to the polarity of the carriers in the channel below the gate electrode of the reset transistor are distributed on sidewalls of the trench isolation surrounding the active regions.

11. The solid-state imaging device of claim 9 ,

wherein a plurality of photodiodes share one detection capacitor and one reset transistor,

wherein active regions of each photodiode of the plurality of photodiodes and the detection capacitor are connected seamlessly, while active regions of the plurality of photodiodes and an active regions of the reset transistor are not directly connected, and

wherein the ions enhancing the generation of the carriers of the opposite polarity to the polarity of the carriers in a channel below the gate electrode of the reset transistor are distributed on each sidewall of the trench isolation surrounding the active regions.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2014
From: PANASONIC CORPORATION
To: COLLABO INNOVATIONS, INC.
Reel/Frame 033021/0806 →
LIEN Recorded Jan 13, 2014
From: COLLABO INNOVATIONS, INC.
To: PANASONIC CORPORATION
Reel/Frame 031997/0445 →