In-plane switching mode liquid crystal display device and method of fabricating thereof

1. A liquid crystal display device, comprising:

first and second substrates;

a liquid crystal layer formed between the first and second substrates;

a plurality of pixel regions defined in a matrix configuration on the first substrate;

a plurality of gate lines extending along a first direction on the first substrate and dividing each of the pixel regions into first and second sub-pixel regions that are adjacent to each other along a second direction substantially perpendicular to the first direction;

a plurality of data lines extending along the second direction and crossing the gate lines;

a plurality of common and pixel electrodes for generating an in-plane electric field in the first and second sub-pixel regions, the common and pixel electrodes being disposed to be substantially parallel to the gate line;

common electrode connection lines connected electrically to the common electrodes, the common electrode connection lines being parallel to the data line;

common lines connected to the common electrode connection lines, the common line being parallel to the gate line;

pixel electrode lines connected electrically to the pixel electrodes, the pixel electrode lines being parallel to the data line; and

a switching device formed at the crossing the gate and data lines and driving the first and second sub-pixel regions,

wherein the switching device includes a gate electrode, a semiconductor layer, and source and drain electrodes, and the drain electrode includes a second drain electrode connected with the pixel electrodes of the first sub-pixel region and a third drain electrode connected with the pixel electrodes of the second sub-pixel region, the source electrode including first and second source electrodes extruded from the data line and the drain electrode including a first drain electrode disposed between the first and the second source electrodes over the gate electrode and the second and third drain electrodes branched from the first drain electrode to the first and second sub-pixel regions through the gate electrode,

wherein the common electrode connection lines are partially overlapped with the pixel electrode lines at both sides of the first sub-pixel region and the second sub-pixel region to form a first storage capacitor at the first sub-pixel region and a second storage capacitor at the second sub-pixel region and a common electrode connection line adjacent to the data line is extended from a pixel electrode line toward the data line so that the side of the common electrode connection line is facing with the side of the data line.

2. The device according to claim 1 , further comprising:

a gate insulation film interposed between the gate and data lines; and

a passivation film formed over the gate insulation film.

3. The device according to claim 2 , wherein the pixel electrodes are formed on the passivation film.

4. The device according to claim 1 , wherein the common electrodes and pixel electrodes are slanted to the gate line.

5. The device according to claim 1 , wherein the common and pixel electrodes of the first sub-pixel region are symmetrical with respect to the gate line with those of the second pixel-region.

6. The device according to claim 1 , wherein the second drain electrode is connected with the pixel electrodes of the first sub-pixel region through a first contact hole and the third drain electrode is connected with the pixel electrodes of the second sub-pixel region through a second contact hole.

7. A method for fabricating a liquid crystal display device, comprising:

preparing first and second substrates;

forming a plurality of gate lines, common lines, and common electrode connection lines arranged on the first substrate and a plurality of common electrodes extending from the common lines;

forming a plurality of data lines arranged crossing the common lines to define a plurality of pixel regions, each pixel region including first and second sub-pixel regions adjacent to each other, a source electrode including first and second source electrodes extruded from the data line on the gate line, and a drain electrode spaced apart from the source electrode and divided into first and second drain electrodes extended to the first and second sub-pixel regions through the gate electrode;

forming a plurality of pixel electrodes, for generating an in-plane electric field together with the common electrodes in the first and second sub-pixel regions, a plurality of pixel electrode lines for electrically interconnecting the pixel electrodes, and first and second storage capacitors in the first and second sub-pixel regions by overlapping partially the pixel electrode lines with the common electrode connection lines at the both sides of the first and second sub-pixel regions; and

forming a liquid crystal layer between the first and second substrates,

wherein the common and the pixel electrodes are substantially parallel to the gate line and the common electrode connection lines and the pixel electrode lines are parallel to the data line, and a common electrode connection line adjacent to the data line is extended from a pixel electrode line toward the data line so that the side of the common electrode connection line is facing with the side of the data line.

8. The method according to claim 7 , further comprising:

forming a semiconductor layer between the gate line and the source and drain electrodes;

forming a passivation film on the entire surface of the substrate including the source and drain electrodes; and

exposing a portion of the first and second drain electrodes.

9. The method according to claim 7 , wherein the pixel electrodes are made of a conductive material including at least one of Indium Tin Oxide and Indium Zinc Oxide.

10. The method according to claim 7 , wherein the step of preparing the second substrate comprises:

forming a black matrix on the second substrate; and

forming a color filter on the black matrix.