IP Library Granted Patent US 7,420,790
Granted Patent B2
US 7,420,790 · App. 11/299,897 · Granted Sep 2, 2008

Integrated circuit with protection against electrostatic damage

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Quick Facts
Patent No.
US 7,420,790
App. No.
11/299,897
Granted
Sep 2, 2008
Kind
B2
Abstract

An IC having inputs and outputs for a plurality of frequency bands from a high frequency band to a low frequency band is protected from electrostatic damage. A high-frequency section of the IC is provided with a protection circuit including diode-connected transistors connected by multiple stages. In addition, there are applied the transistors in which elements thereof are isolated by insulator that can prevent thyristor operation.

Claims (96)

1. A semiconductor integrated circuit comprising:

a plurality of input and output terminals, and

two or more kinds of protection circuits against electrostatic discharge having different parasitic capacitances from each other as different electrical characteristics thereof,

wherein a first protection circuit of said two or more kinds of protection circuits is connected to one of said plurality of input and output terminals through which a first signal having a first frequency passes, and has a first parasitic capacitance,

wherein a second protection circuit of said two or more kinds of protection circuits other than said first protection circuit is connected to another of said plurality of input and output terminals through which a second signal having a second frequency lower than the first frequency passes, and has a second parasitic capacitance larger than the first parasitic capacitance,

wherein said first protection circuit comprises a plurality of diode-connected transistors connected in series and having the first parasitic capacitance,

wherein said second protection circuit comprises a plurality of diode-connected transistors connected in series and having the second parasitic capacitance, the number of diode-connected transistors in said second protection circuit being less than the number of diode-connected transistors in said first protection circuit, and

wherein any adjacent transistors of said plurality of diode-connected transistors in said first protection circuit are isolated from one another by a silicon dioxide layer as an insulator so that all of said diode-connected transistors connected in series in said first protection circuit are isolated from each other by the silicon dioxide layer and so that sufficient isolation is provided to avoid thyristor operation of these transistors.

2. A semiconductor integrated circuit comprising:

a plurality of input and output terminals, and

two or more kinds of protection circuits against electrostatic discharge having different parasitic capacitances from each other as different electrical characteristics thereof,

wherein a first protection circuit of said two or more kinds of protection circuits is connected to one of said plurality of input and output terminals through which a first signal having a first frequency passes, and has a first parasitic capacitance,

wherein a second protection circuit of said two or more kinds of protection circuits other than said first protection circuit is connected to another of said plurality of input and output terminals through which a second signal having a second frequency lower than the first frequency passes, and has a second parasitic capacitance larger than the first parasitic capacitance,

wherein said first protection circuit comprises a plurality of diode-connected transistors connected in series and having the first parasitic capacitance,

wherein said second protection circuit comprises a diode-connected transistor single stage and having the second parasitic capacitance, and

wherein any adjacent transistors of said plurality of diode-connected transistors in said first protection circuit are isolated from one another by a silicon dioxide layer as an insulator so that all of said diode-connected transistors connected in series in said first protection circuit are isolated from each other by the silicon dioxide layer and so that sufficient isolation is provided to avoid thyristor operation of these transistors.

3. A semiconductor integrated circuit comprising:

a plurality of input and output terminals, and

two or more kinds of protection circuits against electrostatic discharge having different parasitic capacitances from each other as different electrical characteristics thereof,

wherein a first protection circuit of said two or more kinds of protection circuits is connected to one of said plurality of input and output terminals through which a first signal having a first frequency passes, and has a first parasitic capacitance,

wherein a second protection circuit of said two or more kinds of protection circuits other than said first protection circuit is connected to another of said plurality of input and output terminals through which a second signal having a second frequency lower than the first frequency passes, and has a second parasitic capacitance larger than the first parasitic capacitance,

wherein said first protection circuit has a first breakdown voltage,

wherein said second protection circuit has a second breakdown voltage different from the first breakdown voltage,

wherein said first protection circuit comprises a plurality of diode-connected transistors connected in series and having the first parasitic capacitance,

wherein said second protection circuit comprises a plurality of diode-connected transistors connected in series and having the second parasitic capacitance, the number of diode-connected transistors in said second protection circuit being less than the number of diode-connected transistors in said first protection circuit, and

wherein any adjacent transistors of said plurality of diode-connected transistors in said first protection circuit are isolated from one another by a silicon dioxide layer as an insulator so that all of said diode-connected transistors connected in series in said first protection circuit are isolated from each other by the silicon dioxide layer and so that sufficient isolation is provided to avoid thyristor operation of these transistors.

4. A semiconductor integrated circuit comprising:

a plurality of input and output terminals, and

two or more kinds of protection circuits against electrostatic discharge having different parasitic capacitances from each other as different electrical characteristics thereof,

wherein a first protection circuit of said two or more kinds of protection circuits is connected to one of said plurality of input and output terminals through which a first signal having a first frequency passes, and has a first parasitic capacitance,

wherein a second protection circuit of said two or more kinds of protection circuits other than said first protection circuit is connected to another of said plurality of input and output terminals through which a second signal having a second frequency lower than the first frequency passes, and has a second parasitic capacitance larger than the first parasitic capacitance,

wherein said first protection circuit has a first breakdown voltage, and

wherein said second protection circuit has a second breakdown voltage different from the first breakdown voltage,

wherein said first protection circuit comprises a plurality of diode-connected transistors connected in series and having the first parasitic capacitance,

wherein said second protection circuit comprises a diode-connected transistor single stage and having the second parasitic capacitance, and

wherein any adjacent transistors of said plurality of diode-connected transistors in said first protection circuit are isolated from one another by a silicon dioxide layer as an insulator so that all of said diode-connected transistors connected in series in said first protection circuit are isolated from each other by the silicon dioxide layer and so that sufficient isolation is provided to avoid thyristor operation of these transistors.

5. A semiconductor integrated circuit comprising:

first input and output terminals,

second input and output terminals,

a first pair of protection circuits against electrostatic discharge, one protection circuit thereof being connected to said first input terminal and the other being connected to said first output terminal; and

a second pair of protection circuits against electrostatic discharge, one protection circuit thereof being connected to said second input terminal and the other being connected to said second output terminal,

wherein said first input and output terminals are configured so that a first frequency signal passes through said first input and output terminals,

wherein said second input and output terminals are configured so that a second frequency signal passes through said second input and output terminals, the second frequency being lower than the first frequency,

wherein each of said first pair of protection circuits has a first parasitic capacitance as an electrical characteristic thereof,

wherein each of said second pair of protection circuits has a second parasitic capacitance larger than the first parasitic capacitance so as to have an electrical characteristic different from the electrical characteristic of each of said first pair of protection circuits,

wherein each of said first pair of protection circuits comprises a plurality of diode-connected transistors connected in series and having the first parasitic capacitance, and

wherein each of said second pair of protection circuits comprises a plurality of diode-connected transistors connected in series and having the second parasitic capacitance, the number of diode-connected transistors in each of said second pair of protection circuits being less than the number of diode-connected transistors in each of said first pair of protection circuits

wherein any adjacent transistors of said plurality of diode-connected transistors in each of said first pair of protection circuits are isolated from one another by a silicon dioxide layer as an insulator so that all of said diode-connected transistors connected in series in each of said first pair of protection circuits are isolated from each other by the silicon dioxide layer and so that sufficient isolation is provided to avoid thyristor operation of these transistors.

6. A semiconductor integrated circuit comprising:

first input and output terminals,

second input and output terminals,

a first pair of protection circuits against electrostatic discharge, one protection circuit thereof being connected to said first input terminal and the other being connected to said first output terminal; and

a second pair of protection circuits against electrostatic discharge, one protection circuit thereof being connected to said second input terminal and the other being connected to said second output terminal,

wherein said first input and output terminals are configured so that a first frequency signal passes through said first input and output terminals,

wherein said second input and output terminals are configured so that a second frequency signal passes through said second input and output terminals, the second frequency being lower than the first frequency,

wherein each of said first pair of protection circuits has a first parasitic capacitance as an electrical characteristic thereof, and

wherein each of said second pair of protection circuits has a second parasitic capacitance larger than the first parasitic capacitance so as to have an electrical characteristic different from the electrical characteristic of each of said first pair of protection circuits,

wherein each of said first pair of protection circuits comprises a plurality of diode-connected transistors connected in series and having the first parasitic capacitance,

wherein each of said second pair of protection circuits comprises a diode-connected transistor single stage and having the second parasitic capacitance, and

wherein any adjacent transistors of said plurality of diode-connected transistors in each of said first pair of protection circuits are isolated from one another by a silicon dioxide layer as an insulator so that all of said diode-connected transistors connected in series in each of said first pair of protection circuits are isolated from each other by the silicon dioxide layer and so that sufficient isolation is provided to avoid thyristor operation of these transistors.

7. A semiconductor integrated circuit comprising:

first input and output terminals,

second input and output terminals,

a first pair of protection circuits against electrostatic discharge, one protection circuit thereof being connected to said first input terminal and the other being connected to said first output terminal; and

a second pair of protection circuits against electrostatic discharge, one protection circuit thereof being connected to said second input terminal and the other being connected to said second output terminal,

wherein said first input and output terminals are configured so that a first frequency signal passes through said first input and output terminals,

wherein said second input and output terminals are configured so that a second frequency signal passes through said second input and output terminals, the second frequency being lower than the first frequency,

wherein each of said first pair of protection circuits has a first parasitic capacitance as an electrical characteristic thereof,

wherein each of said second pair of protection circuits has a second parasitic capacitance larger than the first parasitic capacitance so as to have an electrical characteristic different from the electrical characteristic of each of said first pair of protection circuits,

wherein each of said first pair of protection circuits has a first breakdown voltage,

wherein each of said second pair of protection circuits has a second breakdown voltage different from the first breakdown voltage,

wherein each of said first pair of protection circuits comprises a plurality of diode-connected transistors connected in series and having the first parasitic capacitance, and

wherein each of said second pair of protection circuits comprises a plurality of diode-connected transistors connected in series and having the second parasitic capacitance, the number of diode-connected transistors in each of said second pair of protection circuits being less than the number of diode-connected transistors in each of said first pair of protection circuits, and

wherein any adjacent transistors of said plurality of diode-connected transistors in each of said first pair of protection circuits are isolated from one another by a silicon dioxide layer as an insulator so that all of said diode-connected transistors connected in series in each of said first pair of protection circuits are isolated from each other by the silicon dioxide layer and so that sufficient isolation is provided to avoid thyristor operation of these transistors.

8. A semiconductor integrated circuit comprising:

first input and output terminals,

second input and output terminals,

a first pair of protection circuits against electrostatic discharge, one protection circuit thereof being connected to said first input terminal and the other being connected to said first output terminal; and

a second pair of protection circuits against electrostatic discharge, one protection circuit thereof being connected to said second input terminal and the other being connected to said second output terminal,

wherein said first input and output terminals are configured so that a first frequency signal passes through said first input and output terminals,

wherein said second input and output terminals are configured so that a second frequency signal passes through said second input and output terminals, the second frequency being lower than the first frequency,

wherein each of said first pair of protection circuits has a first parasitic capacitance as an electrical characteristic thereof,

wherein each of said second pair of protection circuits has a second parasitic capacitance larger than the first parasitic capacitance so as to have an electrical characteristic different from the electrical characteristic of each of said first pair of protection circuits,

wherein each of said first pair of protection circuits has a first breakdown voltage,

wherein each of said second pair of protection circuits has a second breakdown voltage different from the first breakdown voltage,

wherein each of said first pair of protection circuits comprises a plurality of diode-connected transistors connected in series and having the first parasitic capacitance,

wherein each of said second pair of protection circuits comprises a diode-connected transistor single stage and having the second parasitic capacitance, and

wherein any adjacent transistors of said plurality of diode-connected transistors in each of said first pair of protection circuits are isolated from one another by a silicon dioxide layer as an insulator so that all of said diode-connected transistors connected in series in each of said first pair of protection circuits are isolated from each other by the silicon dioxide layer and so that sufficient isolation is provided to avoid thyristor operation of these transistors.

9. The semiconductor integrated circuit of claim 1 , constituted by a single chip.

10. The semiconductor integrated circuit of claim 2 , constituted by a single chip.

11. The semiconductor integrated circuit of claim 3 , constituted by a single chip.

12. The semiconductor integrated circuit of claim 4 , constituted by a single chip.

13. The semiconductor integrated circuit of claim 5 , constituted by a single chip.

14. The semiconductor integrated circuit of claim 6 , constituted by a single chip.

15. The semiconductor integrated circuit of claim 7 , constituted by a single chip.

16. The semiconductor integrated circuit of claim 8 , constituted by a single chip.