IP Library Granted Patent US 8,014,533
Granted Patent B2
US 8,014,533 · App. 11/300,236 · Granted Sep 6, 2011

Audio output driver for reducing electromagnetic interference and improving audio channel performance

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Quick Facts
Patent No.
US 8,014,533
App. No.
11/300,236
Granted
Sep 6, 2011
Kind
B2
Abstract

An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Claims (59)

1. A direct current (DC)-coupled stereo output circuit comprises:

an on-chip left channel amplifier module;

an on-chip center channel amplifier module;

an on-chip right channel amplifier module;

a left channel integrated circuit (IC) pin operably coupled to an output of the on-chip left channel amplifier module;

a right channel IC pin operably coupled to an output of the on-chip right channel amplifier module;

a center channel IC pin operably coupled to an output of the on-chip center channel amplifier module;

a center channel feedback IC pin operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop;

a left jack connection operably coupled to the left channel IC pin;

a right jack connection operably coupled to the right channel IC pin;

a jack return connection coupled to the center channel feedback IC pin; and

an inductor, wherein a first node of the inductor is coupled to the jack return connection and a second node of the inductor is coupled to the center channel IC pin.

2. The direct current (DC)-coupled stereo output circuit of claim 1 comprises:

the operable coupling of the left jack connection to the left channel integrated circuit (IC) pin includes a second inductor, wherein a first node of the second inductor is coupled to the left channel IC pin and a second node of the second inductor is coupled to the left jack connection; and

the operable coupling of the right jack connection to the right channel IC pin includes a third inductor, wherein a first node of the third inductor is coupled to the right channel IC pin and a second node of the third inductor is coupled to the right jack connection.

3. The direct current (DC)-coupled stereo output circuit of claim 1 further comprises:

the coupling of the jack return connection to the center feedback integrated circuit (IC) pin includes a resistive element, wherein a first node coupled to the center feedback IC pin and a second node operably coupled to a jack return connection; and

a capacitor having a first node coupled to the center channel IC pin and a second node coupled to the center feedback IC pin.

4. The direct current (DC)-coupled stereo output circuit of claim 1 wherein the inductor comprises a ferrite-core inductor.

5. The direct current (DC)-coupled stereo output circuit of claim 1 further comprises:

an antenna operably coupled to the jack return connection.

6. The direct current (DC)-coupled stereo output circuit of claim 5 wherein the antenna comprises a headphone lead.

7. An audio channel connection comprises:

an on-chip audio channel amplifier module;

a positive channel integrated circuit (IC) pin operably coupled to a positive output of the on-chip channel amplifier module;

a positive channel feedback IC pin operably coupled to a negative input of the on-chip channel amplifier module to provide a first feedback loop;

a negative channel IC pin operably coupled to a negative output of the on-chip channel amplifier module;

a negative channel feedback IC pin operably coupled to a positive input of the on-chip channel amplifier module to provide a second feedback loop;

a load operably coupled between the positive channel feedback IC pin and the negative channel feedback IC pin;

a first inductor, wherein a first node of the first inductor is coupled to the positive channel feedback IC pin and a second node of the first inductor is coupled to the positive channel IC pin, and wherein said first inductor is operative to pass audio frequencies at said positive channel IC pin while suppressing interference frequencies at said positive channel IC pin in which said interference frequencies are above said audio frequencies; and

a second inductor, wherein a first node of the second inductor is coupled to the negative channel feedback IC pin and a second node of the second inductor is coupled to the negative channel IC pin, and wherein said second inductor is operative to pass said audio frequencies at said negative channel IC pin while suppressing said interference frequencies at said negative channel IC pin.

8. The audio channel connection of claim 7 wherein each of the first inductor and the second inductor comprise a ferrite-core inductor.

9. A comprehensive system-on-a-chip comprises:

a processing core operably coupled to process input digital data and produce therefrom output digital data;

digital interface circuitry operable coupled to provide the input digital data to the processing core and to receive the output digital data from the processing core;

mixed signal circuitry operably coupled to convert input analog signals into the input digital data and to convert the output digital data into output analog signals;

digital direct current-direct current (DC-DC) converter regulation circuitry operably coupled to convert a source voltage into a supply voltage that supplies at least one of the processing core, the digital interface circuitry, and the mixed signal circuitry; and

DC coupled stereo output circuitry operably coupled to provide the output analog signals for playback, the DC coupled stereo output circuitry comprises:

an on-chip left channel amplifier;

an on-chip center channel amplifier;

an on-chip right channel amplifier;

a left channel integrated circuit (IC) pin operably coupled to an output of the on-chip left channel amplifier;

a right channel IC pin operably coupled to an output of the on-chip right channel amplifier;

a center channel IC pin operably coupled to an output of the on-chip center channel amplifier;

a center channel feedback IC pin operably coupled to an input of the on-chip center channel amplifier to provide a feedback loop;

a left jack connection operably coupled to the left channel IC pin;

a right jack connection operably coupled to the right channel IC pin;

a jack return connection coupled to the center feedback IC pin; and

an inductor, wherein a first node of the inductor is coupled to the jack return connection and a second node of the inductor is coupled to the center channel IC pin.

10. The comprehensive system-on-a-chip of claim 9 comprises:

the operable coupling of the left jack connection to the left channel integrated circuit (IC) pin includes a second inductor, wherein a first node of the second inductor is coupled to the left channel IC pin and a second node of the second inductor is coupled to the left jack connection; and

the operable coupling of the right jack connection to the right channel IC pin includes a third inductor, wherein a first node of the third inductor is coupled to the right channel IC pin and a second node of the third inductor is coupled to the right jack connection.

11. The comprehensive system-on-a-chip of claim 9 , wherein the jack return connection includes:

the coupling of the jack return connection to the center feedback integrated circuit (IC) pin includes a resistive element, wherein having a first node coupled to the center feedback IC pin and a second node operably coupled to a center channel connection; and

a capacitor having a first node coupled to the center channel IC pin and a second node coupled to the center feedback IC pin.

12. The comprehensive system-on-a-chip of claim 9 wherein the inductor is a ferrite-core inductor.

13. The comprehensive system-on-a-chip of claim 9 further comprises:

an antenna operably coupled to the jack return connection.

14. The comprehensive system-on-a-chip of claim 9 wherein the antenna is a headphone lead.

Assignments (16)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 037354 FRAME: 0773. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT RELEASE. Recorded Aug 15, 2016
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, LLC
Reel/Frame 039723/0777 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2016
From: SIGMATEL, LLC
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037583/0428 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037354/0773 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037355/0838 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037354/0734 →
CHANGE OF NAME Recorded Nov 23, 2015
From: SIGMATEL INC.
To: SIGMATEL, LLC
Reel/Frame 037152/0127 →
SECURITY AGREEMENT Recorded Nov 12, 2013
From: SIGMATEL, LLC
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031626/0218 →
SECURITY AGREEMENT Recorded Jun 17, 2013
From: SIGMATEL, LLC
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030628/0636 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded May 10, 2010
From: SIGMATEL, LLC
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 024358/0439 →
SECURITY AGREEMENT Recorded Mar 16, 2010
From: SIGMATEL, LLC
To: CITIBANK, N.A.
Reel/Frame 024079/0406 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
SECURITY AGREEMENT Recorded Jul 9, 2008
From: SIGMATEL, INC.
To: CITIBANK, N.A.
Reel/Frame 021212/0372 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2005
From: FELDER, MATTHEW D.
To: SIGMATEL, INC.
Reel/Frame 017374/0234 →