IP Library Granted Patent US 7,663,456
Granted Patent B2
US 7,663,456 · App. 11/303,157 · Granted Feb 16, 2010

Micro-electromechanical system (MEMS) switch arrays

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,663,456
App. No.
11/303,157
Granted
Feb 16, 2010
Kind
B2
Abstract

A micro-electromechanical system (MEMS) switch array for power switching includes an input node, an output node, and a plurality of MEMS switches, wherein the input node and the output node are independently in electrical communication with a portion of the plurality of MEMS switches, and wherein a failure of any one of the plurality of MEMS switches does not render ineffective another MEMS switch within the MEMS switch array.

Claims (25)

1. A micro-electromechanical system (MEMS) switch array comprising

a first plurality of graded MEMS switches coupled in a first series circuit;

a second plurality of graded MEMS switches coupled in a second series circuit; and

at least one graded MEMS switch coupled in parallel between the first and second series circuits wherein a failure of any one of the graded MEMS switches is limited to the failed switch and does not cause complete failure of the graded MEMS switch array.

2. The MEMS switch array of claim 1 , wherein each graded MEMS switch of the first plurality of graded MEMS switches and the second plurality of graded MEMS switches is coupled in parallel with the at least one graded MEMS switch.

3. A micro-electromechanical system (MEMS) switch array for power switching comprising:

an input node;

an output node;

a first plurality of graded MEMS switches coupled in a first series circuit;

a second plurality of graded MEMS switches coupled in a second series circuit; and

at least one graded MEMS switch coupled in parallel between the first and second series circuits, wherein the input node and the output node are in electrical communication with a portion of the plurality of graded MEMS switches, and wherein a failure of any one of the plurality of graded MEMS switches is limited to the failed switch and does not affect voltage and current capabilities of the MEMS switch array.

4. The MEMS switch array of claim 3 , wherein the input node is in electrical communication with a first and a second graded MEMS switch that are part of at least one plurality of graded MEMS switches, and wherein the first and second graded MEMS switches are coupled in parallel with each other.

5. The MEMS switch array of claim 4 wherein the output node is in electrical communication with a third and a fourth graded MEMS switch that are part of at least one plurality of graded MEMS switches, and wherein the third and fourth MEMS switches are coupled in parallel with each other.

6. The MEMS switch array of claim 5 , wherein the first graded MEMS switch and the third graded MEMS switch are coupled in series with each other.

7. The MEMS switch array of claim 6 , wherein the second graded MEMS switch and the fourth MEMS switch are coupled in series with each other.

8. The MEMS switch array of claim 7 , wherein a fifth MEMS switch that are part of at least one graded MEMS switch coupled in parallel is in electrical communication with the first, second, third, and fourth graded MEMS switches.

9. The MEMS switch array of claim 3 , wherein the failure of multiple graded MEMS switches will not cause a complete failure of the graded MEMS switch array.

10. A method for power switching, comprising:

connecting a plurality of graded MEMS switches to form a MEMS switch array; and

connecting the graded MEMS switch array to an input node and an output node, wherein, upon activation of the plurality of graded MEMS switches, failure of any one of the plurality of graded MEMS switches is limited to the failed switch and does not cause a complete failure of the functionality performed by MEMS switch array.

11. The method of claim 10 , wherein the plurality of graded MEMS switches are activated simultaneously.

12. The method of claim 10 , wherein the plurality of graded MEMS switches are activated in sequence.

13. The method of claim 12 , wherein the MEMS switch array comprises one or more columns of graded MEMS switches in parallel and one or more rows of graded MEMS switches in series, and wherein the one or more rows of graded MEMS switches are activated before the one or more columns of graded MEMS switches.

14. The method of claim 12 , wherein the MEMS switch array comprises one or more columns of graded MEMS switches in parallel and one or more rows of graded MEMS switches in series, and wherein the one or more columns of graded MEMS switches are activated before the one or more rows of graded MEMS switches.

15. The method of claim 10 , wherein the failure of multiple graded MEMS switches will not cause a complete failure of the functionality performed by MEMS switch array.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2025
From: GENERAL ELECTRIC COMPANY
To: GE INTELLECTUAL PROPERTY LICENSING, LLC
Reel/Frame 070636/0815 →
CHANGE OF NAME Recorded Mar 26, 2025
From: GE INTELLECTUAL PROPERTY LICENSING, LLC
To: DOLBY INTELLECTUAL PROPERTY LICENSING, LLC
Reel/Frame 070643/0907 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2025
From: DOLBY INTELLECTUAL PROPERTY LICENSING, LLC
To: EDISON INNOVATIONS, LLC
Reel/Frame 070293/0273 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2005
From: SUBRAMANIAN, KANAKASABAPATHI; PREMERLANI, WILLIAM JAMES; ELASSER, AHMED; ARTHUR, STEPHEN DALEY; BASAVARAJ, SOMASHEKHAR
To: GENERAL ELECTRIC COMPANY
Reel/Frame 017376/0579 →