Methods and apparatuses to generate a shielding mesh for integrated circuit devices
View Patent ↗Methods and apparatuses to design an Integrated Circuit (IC) with a shielding of wires. In at least one embodiment, a shielding mesh of at least two reference voltages (e.g., power and ground) is used to reduce both the capacitive coupling and the inductive coupling in routed signal wires in IC chips. In some embodiments, a type of shielding mesh (e.g., a shielding mesh with a window surrounded by a power ring, or a window with a parser set of shielding wires) is selected to make more routing area available in locally congested areas. In other embodiments, the shielding mesh is used to create or add bypass capacitance. Other embodiments are also disclosed.
1. A method for designing an integrated circuit, the method comprising:
determining, through a processing or measuring device, distribution of temperatures on an integrated circuit (IC);
if the distribution of temperatures is substantially uneven, inserting, in response to the determining, through the processing device, a representation of a shielding mesh into at least one layer of the IC, wherein the shielding mesh includes a first line on the at least one layer of the IC to carry a first reference voltage and a second line on the at least one layer of the IC to carry a second reference voltage, wherein the shielding mesh is to even out the distribution of temperatures on the IC, wherein a plurality of temperatures are determined at a plurality of different locations on the IC, the plurality of temperatures representing a temperature profile and wherein the shielding mesh is for reducing a variation of temperatures in the temperature profile; and
wherein the first line and the second line are generally parallel conductors which carry, in an alternating pattern, the first reference voltage and the second reference voltage respectively.
2. A method as in claim 1 wherein the plurality of temperatures are estimated temperatures determined while designing the IC with a computer aided design (CAD) process and wherein the representation of the shielding mesh comprises at least one of data representing the shielding mesh in a CAD software and at least one mask layer used to manufacture the IC.
3. A machine readable storage device containing executable computer program instructions which when executed by a data processing system cause the data processing system to perform a method for designing an integrated circuit comprising:
determining, through a processing or measuring device, distribution of temperatures on an integrated circuit (IC);
if the distribution of temperatures is substantially uneven, inserting, through the processing device, a representation of a shielding mesh into at least one layer of the IC, wherein the shielding mesh includes a first line on the at least one layer of the IC to carry a first reference voltage and a second line on the at least one layer of the IC to carry a second reference voltage, wherein the shielding mesh is to even out the distribution of temperatures on the IC,
wherein a plurality of temperatures are determined at a plurality of different locations on the IC, the plurality of temperatures representing a temperature profile and wherein the shielding mesh is for reducing a variation of temperatures in the temperature profile; and
wherein the first line and the second line are generally parallel conductors which carry, in an alternating pattern, the first reference voltage and the second reference voltage respectively.
4. A medium as in claim 3 wherein the plurality of temperatures are estimated temperatures determined while designing the IC with a computer aided design (CAD) process and wherein the representation of the shielding mesh comprises at least one of data representing the shielding mesh in a CAD software and at least one mask layer used to manufacture the IC.
5. A data processing system to design an integrated circuit comprising:
means for determining, through a processing or measuring device, distribution of temperatures on an integrated circuit (IC);
means for inserting, through the processing device, if the distribution of temperatures is substantially uneven, a representation of a shielding mesh into at least one layer of the IC, wherein the shielding mesh includes a first line on the at least one layer of the IC to carry a first reference voltage and a second line on the at least one layer of the IC to carry a second reference voltage, wherein the shielding mesh is to even out the distribution of temperatures on the IC,
wherein a plurality of temperatures are determined at a plurality of different locations on the IC, the plurality of temperatures representing a temperature profile and wherein the shielding mesh is for reducing a variation of temperatures in the temperature profile; and
wherein the first line and the second line are generally parallel conductors which carry, in an alternating pattern, the first reference voltage and the second reference voltage respectively.