Dual field plate MESFET

1 . A Metal-Semiconductor-Field-Effect-Transistor (MESFET) comprising:

a gate electrode;

a drain electrode, the gate electrode and drain electrode formed on a substrate, and the substrate defining a semi-insulating layer having a doped portion of a drain contact region of the drain electrode formed thereon;

a gate side field plate at the gate electrode; and

a drain side field plate in proximity to the drain electrode and extending over a burnout improvement region in the substrate.

2 . A MESFET in accordance with claim 1 wherein the gate side field plate extends over the entire gate electrode.

3 . A MESFET in accordance with claim 1 wherein the gate side field plate extends over a portion of the gate electrode.

4 . A MESFET in accordance with claim 1 wherein the gate side field plate and the drain side field plate are in a single plane.

5 . A MESFET in accordance with claim 1 further comprising a protective layer and wherein the gate side field plate and the drain side field plate are separated by at least a portion of the protective layer.

6 . A MESFET in accordance with claim 1 wherein the drain side field plate extends towards the gate electrode from the drain electrode.

7 . A MESFET in accordance with claim 1 wherein the gate side field plate extends towards the drain electrode from the gate electrode.

8 . A MESFET in accordance with claim 1 wherein the gate side field plate and the drain side field plate are formed during a single processing operation.

9 . A MESFET in accordance with claim 1 wherein the gate side field plate and drain side field plate each comprise electrically conductive field plates.

10 . A MESFET in accordance with claim 1 wherein the gate side field plate and drain side field plate are of substantially the same size.

11 . A MESFET in accordance with claim 1 wherein the gate side field plate and drain side field plate are of different sizes.

12 . A MESFET in accordance with claim 1 wherein the gate side field plate and drain side field plate are provided in a plane with the gate electrode and drain electrode.

13 . A drain side field plate for a Metal-Semiconductor-Field-Effect-Transistor (MESFET), the drain side field plate comprising:

an electrically conductive field plate extending from a drain electrode to a gate electrode of the MESFET and formed over an N+ doped portion and n′ portion of a substrate of the MESFET.

14 . A drain side field plate in accordance to claim 13 wherein the electrically conductive field plate is in a plane of the MESFET having a gate side field plate.

15 . A drain side field plate in accordance to claim 13 wherein the electrically conductive field plate is configured to spread electric fields in the MESFET under open channel conditions.

16 . A method of forming a Metal-Semiconductor-Field-Effect-Transistor (MESFET), the method comprising:

forming a gate electrode on a substrate;

forming a drain electrode on the substrate;

forming a gate side field plate at the gate electrode; and

forming a drain side field plate in proximity to the drain electrode and over an N+ portion and n′ portion of the substrate.

17 . A method in accordance with claim 16 wherein the gate side field plate and drain side field plate are formed in a single plane.

18 . A MESFET in accordance with claim 1 wherein the burnout improvement region comprises an implant region configured to reduce burnout by reducing electric fields.

19 . A MESFET in accordance with claim 1 wherein the burnout improvement region comprises an n-type implant between a p-type layer and an n+ region.

20 . A drain side field plate in accordance with claim 13 wherein the n′ portion comprises a burnout reduction region formed from an n-type implant.