Merged and Isolated Power MESFET Devices
A first type of merged power MESFET device includes two monolithically integrated MESFETS. The MESFETS share common sources and gates, and are sized so that one MESFET may be used as a power device while the other is used as a current-sense device. A second type of merged power MESFET device includes two monolithically integrated MESFETS. The MESFETS share a common region which serves as the source for one MESFET and the drain for the second MESFET. This allows the two MESFETS to function as the high and low-side switches for a buck or boost regulator. A third type of merged power MESFET device combines the high and low-side switches with a current-sensing device.
1 . A switching device that comprises:
a substrate;
a first MESFET fabricated on the substrate, the first MESFET including a first gate, a first source, and a first drain; and
a second MESFET fabricated on the substrate, the second MESFET including:
a second gate that is electrically shorted to the first gate;
a second source that is electrically shorted to the first source; and
a second drain that is not electrically shorted to the first drain.
2 . The switching device of claim 1 where the gate width of the second MESFET is “n” times larger than the first MESFET.
3 . The switching device of claim 2 where the second MESFET is used as a power device and where the smaller second device is used to indirectly monitor the current in the first device.
4 . The switching device of claim 2 where n is in the range of 100 to 5000.
5 . The switching device of claim 1 where the semiconductor material is gallium arsenide (GaAs).
6 . The switching device of claim 1 where the semiconductor material is indium phosphide (InP).
7 . A switching device that comprises:
a substrate;
a first MESFET fabricated on the substrate, the first MESFET including a first gate, a first source, and a first drain; and
a second MESFET fabricated on the substrate, the second MESFET having a gate width substantially larger than the first MESFET, the second MESFET including:
a second gate that is electrically shorted to the first gate;
a second source that is electrically shorted to the first source; and
a second drain that is not electrically shorted to the first drain but is held at substantially the same voltage by adjusting the drain current through the first MESFET.
8 . The switching device of claim 7 where the drain current in first MESFET is controlled by a differential amplifier comparing the voltage at the drains at the first and second MESFETs.
9 . The switching device of claim 7 where the second MESFET comprises the power device in a boost converter.
10 . A monolithically-integrated merged dual MESFET comprising a first gate, a first source, a first drain; and a second drain where the first gate laterally surrounds both the first and second drains.
11 . The merged dual MESFET of claim 10 where the first gate has a shape that resembles the number eight.
12 . The merged dual MESFET of claim 10 where first source surrounds the first gate.
13 . A switching device that comprises:
a substrate;
a first MESFET fabricated on the substrate, the first MESFET including a first gate, a first source, and a first drain; and
a second MESFET fabricated on the substrate, the second MESFET including:
a second gate that is not electrically shorted to the first gate;
a second source that is electrically shorted to the first drain at a node V x; and
a second drain.
14 . The switching device of claim 13 where the first source is grounded or connected to the negative terminal of a battery, where the second drain is connected to a positive supply voltage or the positive terminal of a the battery, and where an inductor is connected between an output node and the node Vx, and where a filter capacitor is connected between the output node and the ground.
15 . The switching device of claim 14 comprising the power stage of a synchronous Buck switching voltage regulator.
16 . The switching device of claim 14 where the first and second MESFETs are operated to conduct out of phase so that no more than one of the MESFETs is “on” at the any time.
17 . The switching device of claim 14 where the on time of the MESFETs is used to regulate the voltage at the converter output either by varying the switching pulse width or switching frequency.
18 . The switching device of claim 14 where a Schottky diode is connected in parallel with the first MESFET, with the Schottky cathode connected to the first drain and the Schottky-anode connected to the first source.
19 . The switching device of claim 13 where an inductor is connected between a positive supply voltage or the positive terminal of a the battery and the node Vx, and where the second drain is connected to an output node and where a filter capacitor is connected between the output node and ground.
20 . The circuit of claim 19 comprising the power stage of a synchronous boost switching voltage regulator.
21 . The switching device of claim 19 where the first and second MESFETs are operated to conduct out of phase so that no more than one of the MESFETs is “on” at the any time.
22 . The switching device of claim 19 where the on time of the MESFETs is used to regulate the voltage at the converter output either by varying the switching pulse width or switching frequency.
23 . The switching device of claim 19 where a Schottky diode is connected in parallel with the second MESFET, with the Schottky cathode connected to the second drain and the Schottky-anode connected to the second source.
24 . The switching device of claim 19 where a Zener diode is connected in parallel with the second MESFET, with the Schottky cathode connected to the first drain and the Schottky-anode connected to the first source.
25 . A monolithically-integrated merged dual MESFET comprising a first source, a first gate, a second source, a second gate, and a first drain; where the first gate laterally surrounds the first the source, where the second gate laterally surrounds the second the source, and where the first drain laterally surrounds both first and second gates.
26 . The merged dual MESFET of claim 25 where the first drain has a shape that resembles the number eight.
27 . A merged MESFET device that comprises:
a substrate;
a first MESFET fabricated on the substrate, the first MESFET including a first gate, a first source, and a first drain;
a second MESFET fabricated on the substrate, the second MESFET including:
a second gate electrically shorted to the first gate,
a second source electrically shorted to the first source, and
a second drain, and
a third MESFET fabricated on the substrate, the third MESFET including:
a third gate,
a third source electrically shorted to the second drain at a node Vx, and
a third drain.
28 . The MESFET merged device of claim 27 where the gate width of the second MESFET is substantially larger than the gate width of the first MESFET.
29 . The merged MESFET device of claim 28 where the gate width of the second MESFET is 100 to 5000 times larger than that of the first MESFET.
30 . The MESFET merged device of claim 27 where the gate width of the second MESFET is substantially similar to the gate width of the third MESFET.
31 . The merged MESFET device of claim 30 where the gate width of the second MESFET is 0.33 to 3 times that of the first MESFET.
32 . The merged MESFET device of claim 27 where the second and third MESFETs are operated to conduct out of phase so that no more than one of the MESFETs is “on” at the any time.
33 . The merged MESFET device of claim 27 where the first MESFET is used to monitor the current in the second MESFET.
34 . The merged MESFET device of claim 27 where the second and third MESFETs form a power push-pull driver used to implement a switching voltage regulator in conjunction with an inductor and an output filter capacitor.
35 . The merged MESFET device of claim 34 in a step-up synchronous boost converter.
36 . The merged MESFET device of claim 34 in a step-down synchronous Buck converter.
37 . The merged MESFET device of claim 27 where the first and second sources are grounded or connected to the negative terminal of a battery, where the third drain is connected to a positive supply voltage or the positive terminal of a battery, and where an inductor is connected between an output node and the node Vx, and where a filter capacitor is connected between the output node and the ground or the negative terminal of the battery.
38 . The merged MESFET device of claim 37 comprising a synchronous Buck switching voltage regulator.
39 . The merged device of claim 27 used in a circuit where the first and second sources are grounded or connected to the negative terminal of a battery, and where an inductor is connected between a positive supply voltage or the positive terminal of a the battery and the node Vx and where the third drain is connected to an output node, and where a filter capacitor is connected between the output node and the ground or the negative terminal of the battery.
40 . The merged MESFET device of claim 39 comprising a synchronous boost switching voltage regulator.
41 . The merged device of claim 27 where the first MESFET is used to monitor the current in the second MESFET.
42 . A monolithically-integrated merged triple MESFET comprising a first source, a first gate, a second gate, and a first, second and third drain; where the first gate laterally surrounds the first the source and also surrounds a first drain, where the first gate is also surrounded by a second drain, which also laterally surrounds a second gate, where the second gate laterally surrounds a third drain.
43 . a monolithically-integrated merged triple MESFET comprising
a first gate formed as an inner ring interconnected to an outer ring,
a first drain surrounded by the inner ring of the first gate;
a first source that substantially surrounds the inner ring of the first gate and is substantially surrounded by the outer ring of the first gate;
a second drain that surrounds the first gate;
a second gate that surrounds the second drain; and a third drain that surrounds the second drain.