Mixer for homodyne RF receiver
View Patent ↗A mixer of a homodyne RF receiver made from a CMOS process is provided. The mixer comprises a gain stage, a switch stage and a load stage. The gain stage receives a differential-typed RF signal and generating a first gained signal. The switch stage mixes the first gained signal and a LO signal to direct down-convert into a modulated signal. The load stage comprises a first transistor, an impedance element and a second transistor. The first transistor provides a low impedance to permit the modulated signal entering the load stage. The second transistor provides a high impedance to resist signals. The load stage converts the modulated signal to a second gained signal according to a first gain coefficient of the impedance element. The first transistor is a parallel pnp BJT, and the second transistor is a vertical npn bipolar BJT.
1. A mixer of a homodyne radio frequency (RE) receiver, which is made from a CMOS process, comprising:
a gain stage, receiving a differential-typed RF signal and generating a first gained signal;
a switch stage, used for mixing said first gained signal and a local oscillation (LO) signal to direct down-convert into a modulated signal; and
a load stage, comprising a pair of first transistors, an impedance element and a pair of second transistors, the pair of first transistors providing a low impedance to permit said modulated signal entering the load stage, the impedance element having a first gain coefficient, the pair of second transistors providing a high impedance to resist signals, the load stage converting the modulated signal to a second gained signal according to the first gain coefficient, wherein the second transistor is a vertical npn bipolar junction transistor (BJT), which is parasitically formed on a MOS structure.
2. The mixer according to claim 1 , wherein the first transistor is a parallel pnp bipolar junction transistor (BJT), which is parasitically formed on a MOS structure.
3. The mixer according to claim 1 , wherein the mixer is a balanced circuit, wherein the load stage comprises a balanced first portion and a second portion.
4. The mixer according to claim 3 , wherein the pair of first transistors separately belongs to said first portion and said second portion, and the pair of second transistors separately belongs to said first portion and said second portion.
5. The mixer according to claim 4 , wherein the pair of first transistors have gate terminals which are connected to a common node.
6. The mixer according to claim 4 , wherein the pair of second transistors have gate terminals which are connected to a common node.
7. The mixer according to claim 6 , wherein a contact of the common gate of the pair of said second transistors is coupled with a CMFB (common feedback) for detecting unbalance of signals and for feedback.
8. The mixer according to claim 4 , wherein the pair of said second transistors form a current mirror.
9. The mixer according to claim 1 , wherein the impedance element is selected from the group consisting of a capacitance or a first resistance.
10. The mixer according to claim 1 , wherein the second transistors is coupled with a second resistance to provide said high impedance.
11. A mixer of a homodyne radio frequency (RF) receiver, which is made from a CMOS process, comprising:
a gain stage, receiving a differential-typed RF signal and generating a first gained signal;
a switch stage, used for mixing said first gained signal and a local oscillation (LO) signal to direct down-convert into a modulated signal; and
a load stage, comprising a pair of first transistors, an impedance element and a pair of second transistors, the pair of first transistors providing a low impedance to permit said modulated signal entering the load stage, the impedance element having a first gain coefficient, the pair of second transistors providing a high impedance to resist signals, the load stage converting the modulated signal to a second gained signal according to the first gain coefficient, wherein the first transistor is a parallel pnp bipolar junction transistor (BJT), which is parasitically formed on a MOS structure.