IP Library Granted Patent US 7,502,978
Granted Patent B2
US 7,502,978 · App. 11/314,570 · Granted Mar 10, 2009

Systems and methods for reconfiguring scan chains

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Quick Facts
Patent No.
US 7,502,978
App. No.
11/314,570
Granted
Mar 10, 2009
Kind
B2
Abstract

Systems and methods for reconfiguring scan chains are provided. A representative system incorporates a first scan chain of flip-flops operative in either a normal mode or a rotate mode such that, if the first scan chain is operative in the normal mode, inputs are provided to the flip-flops in sequential order with a first of the flip-flops receiving an input prior to a second of the flip-flops, and, if the first scan chain is operative in the rotate mode, inputs are provided to the flip-flops with the first of the flip-flops receiving an input subsequent to the second of the flip-flops.

Claims (26)

1. A method for reconfiguring a scan chain, comprising:

providing a first scan chain of flip-flops;

determining whether the first scan chain is to be operated in either a normal mode or a rotate mode;

providing inputs to the flip-flops in sequential order such that a first of the flip-flops receives an input prior to a second of the flip-flops if it is determined that the first scan chain is to operate in the normal mode; and

providing inputs to the flip-flops such that the first of the flip-flops receives an input subsequent to the second of the flip-flops if it is determined that the first scan chain is to operate in the rotate mode.

2. The method of claim 1 , wherein the first scan chain comprises multiple segments of flip-flops, the first and second flip-flops corresponding to a first of the segments; and

wherein determining whether the first scan chain is to be operated in either a normal mode or a rotate mode comprises:

determining whether the first segment is to be operated in either a normal mode or a rotate mode and whether a second of the segments is to be operated in either a normal mode or a rotate mode.

3. The method of claim 1 , wherein, in providing inputs to the flip-flops such that the first of the flip-flops receives an input subsequent to the second of the flip-flops, the first scan chain is folded into multiple segments that receive inputs in parallel.

4. The method of claim 1 , further comprising:

providing a second scan chain of flip-flops operative to receive scan input data in parallel with the first scan chain.

5. The method of claim 4 , wherein, when the first scan chain is operated in the rotate mode, at least some of the flip-flops of the first and second scan chain that occupy corresponding data positions contain different data.

6. The method of claim 1 , wherein the scan chains form part of an integrated circuit; and further comprising:

analyzing data adjacencies of scan chains of the integrated circuit.

7. The method of claim 6 , further comprising:

applying test patterns to the integrated circuit based, at least in part, upon the data adjacencies.

8. A method for reconfiguring scan chains comprising:

providing an integrated circuit having a first scan chain and a second scan chain operative in parallel such that flip-flops of the first scan chain and the second scan chain that occupy corresponding data positions contain identical scan input data; and

selectively reconfiguring the second scan chain such that flip-flops of the first scan chain and the second scan chain that occupy corresponding data positions do not contain identical scan input data.

9. The method of claim 8 , wherein, in selectively reconfiguring the second scan chain, a last of the flip-flops of the second scan chain receives scan input data prior to a first of the flip-flops of the second scan chain such that last of the flip-flops of the second scan chain receives scan input data identical to scan input data received by a first of the flip-flops of the first scan chain.

10. A system for reconfiguring a scan chain, comprising:

a first scan chain of flip-flops operative in either a normal mode or a rotate mode such that, if the first scan chain is operative in the normal mode, inputs are provided to the flip-flops in sequential order with a first of the flip-flops receiving an input prior to a second of the flip-flops, and, if the first scan chain is operative in the rotate mode, inputs are provided to the flip-flops with the first of the flip-flops receiving an input subsequent to the second of the flip-flops.

11. The system of claim 10 , further comprising:

means for determining whether the first scan chain is to be operated in either the normal mode or the rotate mode.

12. The system of claim 10 , further comprising:

an integrated circuit, wherein the first scan chain is a portion of the integrated circuit.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED AT REEL: 047195 FRAME: 0827. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Nov 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047924/0571 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0827 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD
Reel/Frame 017675/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 9, 2006
From: BRATT, JOHN; REARICK, JEFFREY R
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 017149/0130 →