Phase mapping for QPSK/QBL-MSK waveform
View Patent ↗A method of pulse shaping a spread signal of serially formatted in-phase (I) and quadrature (Q) waveforms, where each waveform includes a predetermined number of chips per symbol, includes (a) examining adjacent chips of the I and Q waveforms at a symbol boundary; and (b) determining that one of the I or Q waveforms, includes two adjacent first and second chips separated by a single chip period, where the first chip belongs to a previous symbol and the second chip belongs to a present symbol. If the chips are of the same value, the method extends a peak value between the first and second chips, and zeros the other waveform of the I or Q waveform during the extended duration. If the chips are of opposite values, then the method zeroes one of the chips and inserts a chip into the other waveform.
1. A method in a receiver of pulse shaping a modulated sequence spread signal having serially formatted in-phase (I) and quadrature (Q) waveforms, each waveform including a predetermined number of chips per symbol, the method comprising the steps of:
examining, by a processor in the receiver, adjacent chips of the I and Q waveforms at a symbol boundary;
determining, by the processor, that one of the I or Q waveforms, at the symbol boundary, includes two adjacent first and second chips separated by a single chip period, where the first chip belongs to a previous symbol and the second chip belongs to a present symbol;
extending, by the processor, for the one chip period, a peak value of the first chip; and
zeroing, by the processor, the other waveform of the I or Q waveform during the extended duration of the peak value.
2. The method of claim 1 , wherein
the determining step includes determining that the Q waveform includes the two adjacent first and second chips separated by a single chip period, and
the zeroing step includes zeroing the I waveform during the extended duration of the peak value.
3. The method of claim 1 , wherein
the determining step includes determining that the I waveform includes the two adjacent first and second chips separated by a single chip period, and
the zeroing step includes zeroing the Q waveform during the extended duration of the peak value.
4. The method of claim 1 , wherein
the examining step includes determining that there exists both of the following conditions:
(a) a symbol state of 0 or 180 degrees before the symbol boundary, and
(b) a phase change of −90 or +90 degrees after the symbol boundary.
5. The method of claim 1 , wherein
the examining step includes determining that there exists both of the following conditions:
(a) a symbol state of −90 or +90 degrees before the symbol boundary, and
(b) a phase change of −90 or +90 degrees after the symbol boundary.
6. The method of claim 1 wherein
the step of extending the peak value of the first chip includes extending a fixed value of +1 or −1 signal level between the first chip and the second chip.
7. The method of claim 1 wherein
the modulated sequence spread signal is one of offset quadrature phase shift keying (OQPSK), minimum shift keying (MSK), quasi band limited-MSK (QBL-MSK), Gaussian MSK, tamed frequency modulation (TFM), intersymbol jitter free OQPSK, raised cosine filtered OQPSK, or bandwidth efficient continuous phase modulation (CPM), and
the method further includes the step of:
transmitting the modulated sequence spread signal, after extending the peak value of the first chip between the first and second chips.
8. The method of claim 1 wherein the number of chips per symbol are 8 chips.
9. The method of claim 1 including the step of:
pulse shaping the modulated sequence spread signal using a look up table (LUT) stored in memory.