IP Library Granted Patent US 8,176,567
Granted Patent B2
US 8,176,567 · App. 11/317,463 · Granted May 8, 2012

Apparatus and method to limit access to selected sub-program in a software system

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Quick Facts
Patent No.
US 8,176,567
App. No.
11/317,463
Granted
May 8, 2012
Kind
B2
Abstract

A method includes receiving at a sub-program a request from an external entity the request comprising at least one parameter and a return address, utilizing the return address and an address list associated with the sub-program to authenticate the external entity, and processing the request if the external entity is authenticated.

Claims (48)

1. A computer implemented method for authenticating a sub-program request using a computer processor having operatively connected a first memory internal to the processor and a second memory external to the processor and associated memory addresses of the computer comprising:

receiving, at a sub-program located in the first memory and executing in the computer processor, the request from an entity located in the second memory, said request comprising at least one parameter and a return memory address from the associated memory addresses associated with the entity;

utilizing said return memory address and a memory address list located in the first memory that is associated with said sub-program to authenticate said external entity; and

processing said request only if said external entity is authenticated.

2. The method of claim 1 wherein said memory address list comprises at least one memory address range.

3. The method of claim 2 wherein said utilizing comprises comparing said return memory address to said at least one memory address range.

4. The method of claim 1 wherein said processing comprises performing a plurality of operations on at least one datum.

5. The method of claim 4 comprising utilizing a microprocessor including the first memory, wherein the first memory includes an internal microprocessor memory that may be modified only using a protected port, and wherein the internal microprocessor memory includes said address list, said sub-program, and said at least one datum.

6. The method of claim 5 comprising utilizing a flash memory to store said address list, said sub-program, and said at least one datum.

7. The method of claim 1 wherein said processing said request comprises performing at least one function using a postal security device (PSD).

8. A computer implemented method for authenticating a sub-program request using a computer processor having operatively connected a first memory internal to the processor and a second memory external to the processor and associated memory addresses of the computer comprising:

associating with a sub-program located in the first memory and executing in the computer processor at least one memory address list located in the first memory and comprising a memory address range from the associated memory addresses and associated with at least one valid requesting entity located in the second memory;

receiving at said sub-program a request from a requesting entity comprising at least one parameter and a return memory address of said requesting entity;

utilizing said return memory address and said at least one memory address list to determine if said requesting entity comprises one of said valid requesting entities; and

performing at least one operation on at least one datum in response to said request only if said requesting entity comprises one of said valid requesting entities.

9. The method of claim 8 wherein said requesting entity comprises one of a program and another sub-program.

10. The method of claim 8 comprising utilizing a microprocessor comprising an internal memory in which is stored said sub-program and said at least one address list.

11. The method of claim 10 comprising utilizing an internal flash memory.

12. The method of claim 8 wherein said utilizing comprises comparing said return memory address to said at least one memory address range.

13. The method of claim 12 wherein said requesting entity is determined to comprise one of said valid requesting entities if said return memory address is within said at least one memory address range.

14. The method of claim 8 comprising returning control to said requesting entity at said return memory address.

15. A computer implemented method for authenticating a sub-program request using a computer processor having operatively connected a first memory internal to the processor and a second memory external to the processor and associated memory addresses of the computer comprising:

associating with a sub-program located in the first memory and executing in the computer processor at least one memory address list located in the first memory and comprising a memory address range from the associated memory addresses and associated with at least one valid requesting entity located in the second memory;

receiving at said sub-program a request from a requesting entity comprising at least one parameter and a return memory address of said requesting entity;

copying at least one datum to at least one duplicate datum;

performing at least one operation on said at least one duplicate datum in response to said request; and

then utilizing said return memory address and said at least one memory address list to determine if said requesting entity comprises one of said valid requesting entities; and

then erasing said at least one duplicate datum if said requesting entity does not comprise one of said valid requesting entities.

16. The method of claim 15 wherein said requesting entity comprises one of a program and another sub-program.

17. The method of claim 15 comprising utilizing a microprocessor comprising an internal memory in which is stored said sub-program and said at least one address list.

18. The method of claim 17 comprising utilizing an internal flash memory.

19. The method of claim 15 wherein said utilizing comprises comparing said return memory address to said at least one memory address range.

20. The method of claim 19 wherein said requesting entity is determined to comprise one of said valid requesting entities if said return memory address is within said at least one memory address range.

21. The method of claim 15 comprising returning a control to said requesting entity at said return memory address.

22. A program of machine-readable instructions, tangibly embodied on an information bearing medium and executable by a digital data processor, including a computer processor having operatively connected memory and associated memory addresses, to perform actions directed toward authenticating a request to a sub-program, the actions comprising:

receiving at a sub-program located in an internal memory of the digital data processor and executing in the digital data processor a request from an external entity said request comprising at least one parameter and a return memory address of the entity;

utilizing said return memory address and a memory address list associated with said sub-program to authenticate said external entity; and

processing said request only if said external entity is authenticated.

23. The program of claim 22 wherein said memory address list comprises at least one memory address range.

24. The program of claim 23 wherein said utilizing comprises comparing said return memory address to said at least one memory address range.

25. The program of claim 22 wherein said processing comprises performing a plurality of operations on at least one datum.

26. A postal security device (PSD) comprising:

a computer processor having operatively connected memory and associated memory addresses, the memory including instructions directing the computer process to:

receive at a sub-program executing in the computer processor a request from an external entity, said request comprising at least one parameter and a return memory address from the associated memory addresses associated with the entity;

utilize said return memory address and a memory address list associated with said sub-program to authenticate said external entity; and

process said request only if said external entity is authenticated.

27. The method of claim 1 further comprising:

utilizing a specific stack sequence of function calls to authenticate said external entity.

Assignments (2)
RELEASE OF PATENT SECURITY AGREEMENT Recorded Feb 19, 2025
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: PITNEY BOWES, INC.
Reel/Frame 070256/0396 →
SECURITY INTEREST Recorded Nov 1, 2019
From: PITNEY BOWES INC.; NEWGISTICS, INC.; BORDERFREE, INC.; TACIT KNOWLEDGE, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050905/0640 →