Method for fabricating image sensor capable of increasing photosensitivity
View Patent ↗An image sensor capable of overcoming a decrease in photo sensitivity resulted from using a single crystal silicon substrate, and a method for fabricating the same are provided. An image sensor includes a single crystal silicon substrate, an amorphous silicon layer formed inside the substrate, a photodiode formed in the amorphous silicon layer, and a transfer gate formed over the substrate adjacent to the photodiode and transferring photoelectrons received from the photodiode.
1. A method for fabricating an image sensor, comprising:
forming a trench for a device isolation in a single crystal silicon substrate;
forming an insulation layer filling the trench;
planarizing the insulation layer filling the trench until the insulation layer is aligned with a top surface of the substrate;
forming a transfer gate apart from the trench on the substrate;
forming an inter-layer insulation layer on a surface of the substrate including the transfer gate;
forming an opening by etching predetermined portions of the substrate and the inter-layer insulation layer between the trench and the transfer gate;
forming an amorphous silicon layer filling the opening;
planarizing the amorphous silicon layer filling the opening until the amorphous silicon layer is aligned with the top surface of the substrate;
recessing the planarized amorphous silicon layer the top surface of the substrate; and
forming a photodiode in the recessed amorphous silicon layer.
2. The method of claim 1 , wherein the amorphous silicon layer includes germanium (Ge).
3. The method of claim 1 , wherein the planarization process includes a chemical mechanical polishing (CMP) process.
4. The method of claim 1 , wherein when performing the planarization with the CMP process, slurry including ceria and silica polishing materials is used and the slurry has a polishing selectivity rate of silicon to silicon oxide (SiO 2 ) maintained between approximately 5:1 and approximately 30:1.
5. The method of claim 4 , further comprising performing a cleaning process by using a standard cleaning (SC)-1 solution before the planarization process performed by using the CMP process, wherein the cleaning process is performed in a CMP apparatus which was dried after the planarization process or another cleaning apparatus.
6. The method of claim 1 , wherein the insulation layer includes a high density plasma (HDP) oxide layer.
7. A method for fabricating an image sensor, comprising:
forming a trench for a device isolation in a single crystal silicon substrate;
forming an insulation layer filling the trench;
planarizing the insulation layer filling the trench until the insulation layer is aligned with a top surface of the substrate;
forming a transfer gate apart from the trench on the substrate;
forming an inter-layer insulation layer on a surface of the substrate including the transfer gate;
forming an opening by etching predetermined portions of the inter-layer insulation layer and the substrate between the trench and the transfer gate;
forming an amorphous silicon layer to cover a portion of the opening and the partially etched inter-layer insulation layer;
recessing a portion of the amorphous silicon layer covering the inter-layer insulation layer; and
forming a photodiode in the amorphous silicon layer.
8. The method of claim 7 , wherein the amorphous silicon layer includes germanium (Ge).
9. The method of claim 7 , wherein the planarization process includes a chemical mechanical polishing (CMP) process.
10. The method of claim 7 , wherein when performing the planarization with the CMP process, slurry including ceria and silica polishing materials is used and the slurry has a polishing selectivity rate of silicon to silicon oxide (SiO 2 ) maintained between approximately 5:1 and approximately 30:1.
11. The method of claim 10 , further comprising performing a cleaning process by using a standard cleaning (SC)-1 solution before the planarization process performed by using the CMP process, wherein the cleaning process is performed in a CMP apparatus which was dried after the planarization process or another cleaning apparatus.
12. The method of claim 7 , wherein the insulation layer includes a high density plasma (HDP) oxide layer.