IP Library Granted Patent US 7,821,566
Granted Patent B2
US 7,821,566 · App. 11/319,745 · Granted Oct 26, 2010

Image sensor and camera system having the same

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Quick Facts
Patent No.
US 7,821,566
App. No.
11/319,745
Granted
Oct 26, 2010
Kind
B2
Abstract

An image sensor includes a pixel array having a plurality of unit pixels with high light sensitivity, for sensing information about image received from an exterior; a control and interface unit for controlling an overall operation of an image sensor chip and acting as an interface with an external system; an analog signal processing unit for processing an analog signal from the pixel array after being controlled by the control and the interface unit; an A/D converter for converting the analog signal into a digital signal; a picture signal processing unit for performing a plurality of image processes in order to enhance image of the digital signal, wherein the picture signal processing unit includes a focus value calculator for calculating a focus value from the digital signal; and an interface unit for providing an exterior with the focus value calculated through the focus value calculator.

Claims (34)

1. A camera system in which an image sensor chip and a driving chip are integrated as a system on chip (SOC), the image sensor chip comprising:

a pixel array having a plurality of unit pixels with high light sensitivity, wherein the pixel array is configured to sense image information received from an exterior;

a control and interface unit configured to control an overall operation of the image sensor chip and act as an interface with an external system;

an analog signal processing unit configured to process an analog signal from the pixel array;

an analog-to-digital (A/D) converter configured to convert the analog image signal into a digital image signal;

a picture signal processing unit configured to perform a plurality of image processes including color adjustment in order to enhance the digital image signal, wherein the picture signal processing unit includes a focus value calculator configured to calculate a focus value from the digital image signal and output the focus value; and

an interface configured to transfer the focus value to the driving chip.

2. The camera system of claim 1 , wherein the focus value calculator is further configured to calculate the focus value for each pixel in real time, accumulate the calculated focus value until one frame is completed, and output the resulting value in a frame unit.

3. The camera system of claim 1 , wherein the driving chip is configured to receive picture information transferred from the image sensor chip and play roles in raising picture quality, compressing information, and adjusting image size.

4. The camera system of claim 1 , wherein the control and interface unit comprises a finite state machine (FSM).

5. A camera system in which an image sensor chip and a driving chip are integrated as a system on chip (SOC), the image sensor chip comprising:

a pixel array;

a control and interface unit;

an analog signal processing unit;

an analog-to-digital (AID) converter; and

a picture signal processing unit configured to perform a plurality of image processes including color adjustment in order to enhance the digital image signal, wherein the picture signal processing unit includes a focus value calculator configured to calculate a focus value from the digital image signal and output the focus value.

6. The camera system of claim 5 , wherein the pixel array comprises a plurality of unit pixels with high light sensitivity, and wherein the pixel array is configured to sense image information received from an exterior.

7. The camera system of claim 5 , wherein the control and interface unit is configured to control an overall operation of the image sensor chip and act as an interface with an external system.

8. The camera system of claim 5 , wherein the analog signal processing unit is configured to process an analog signal from the pixel array.

9. The camera system of claim 5 , wherein the A/D converter is configured to convert an analog image signal into a digital image signal.

10. The camera system of claim 5 , further comprising an interface configured to transfer the focus value to the driving chip.

11. The camera system of claim 5 , wherein the focus value calculator is further configured to calculate the focus value for pixels in real time, accumulate the calculated focus value until one frame is completed, and output the resulting value in a frame unit.

12. The camera system of claim 5 , wherein the driving chip is configured to receive picture information transferred from the image sensor chip and play roles in raising picture quality, compressing information and adjusting image size.

13. The camera system of claim 5 , wherein the control and interface unit comprises a finite state machine (FSM).

14. A camera system in which an image sensor chip and a driving chip are integrated as a system on chip (SOC), the image sensor chip comprising:

a picture signal processing unit configured to perform a plurality of image processes including color adjustment in order to enhance a digital image signal, wherein the picture signal processing unit includes a focus value calculator configured to calculate a focus value from the digital image signal and output the focus value.

15. The camera system of claim 14 , further comprising a pixel array that includes a plurality of unit pixels with high light sensitivity, wherein the pixel array is configured to sense image information received from an exterior.

16. The camera system of claim 14 , further comprising a control and interface unit configured to control an overall operation of the image sensor chip and act as an interface with an external system.

17. The camera system of claim 14 , further comprising an analog signal processing unit configured to process an analog signal from a pixel array.

18. The camera system of claim 14 , further comprising an analog-to-digital (A/D) converter configured to convert an analog image signal into a digital image signal.

19. The camera system of claim 14 , further comprising an interface configured to transfer the focus value to the driving chip.

20. The camera system of claim 14 , wherein the focus value calculator is further configured to calculate the focus value for pixels in real time, accumulate the calculated focus value until one frame is completed, and output the resulting value in a frame unit.

21. The camera system of claim 14 , wherein the driving chip is configured to receive picture information transferred from the image sensor chip and play roles in raising picture quality, compressing information, and adjusting image size.

22. The camera system of claim 14 , wherein the control and interface unit comprises a finite state machine (FSM).

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2025
From: INTELLECTUAL VENTURES ASSETS 200 LLC
To: INTERSTATE PATENTS, LLC
Reel/Frame 073218/0509 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 18, 2025
From: INTELLECTUAL VENTURES II LLC
To: INTELLECTUAL VENTURES ASSETS 200 LLC
Reel/Frame 072049/0758 →
MERGER Recorded Jul 22, 2011
From: CROSSTEK CAPITAL, LLC
To: INTELLECTUAL VENTURES II LLC
Reel/Frame 026637/0632 →
PARTIAL RELEASE OF SECURITY INTEREST Recorded Aug 10, 2009
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL TRUSTEE
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 023075/0054 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2009
From: MAGNACHIP SEMICONDUCTOR, LTD.
To: CROSSTEK CAPITAL, LLC
Reel/Frame 022764/0270 →
AFTER-ACQUIRED INTELLECTUAL PROPERTY KUN-PLEDGE AGREEMENT Recorded Feb 18, 2009
From: MAGNACHIP SEMICONDUCTOR, LTD.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL TRUSTEE
Reel/Frame 022277/0133 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2005
From: JUNG, BYUNG-GEUN
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 017415/0425 →