IP Library Granted Patent US 7,557,007
Granted Patent B2
US 7,557,007 · App. 11/321,453 · Granted Jul 7, 2009

Method for manufacturing semiconductor device

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Quick Facts
Patent No.
US 7,557,007
App. No.
11/321,453
Granted
Jul 7, 2009
Kind
B2
Abstract

The method for manufacturing a semiconductor device according to the invention includes forming a thick silicon oxide film uniformly in a trench. Argon ions or the like implanted obliquely into the trench to form an ion implanted damaged region selectively in the portion of the silicon oxide film on the trench sidewall utilizing the shadowing effects of the oblique ion implantation. The silicon oxide film is wet etched to selectively remove the silicon oxide film in the ion implanted damaged region utilizing the etching rate difference, wherein the etching rate is faster in the damaged region than in the undamaged region. As a result, a thick residual oxide film is formed on the bottom and the lower sidewall portion of the trenchwithout causing any bird's beak.

Claims (23)

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a trench having a bottom, sidewalls and an aperture in a semiconductor substrate;

forming a gate insulator film on the bottom and the sidewalls of the trench, the gate insulator film comprising a silicon oxide film having a thickness; and

removing at least partially a portion of the gate insulator film on the sidewalls of the trench near the aperture thereof so as to selectively reduce the thickness of the portion of the gate insulator film on the sidewalls of the trench near the aperture thereof, the step of removing being comprised of:

a first step of forming an ion implanted damaged region locally in the gate insulator film in which ions are implanted into the exposed gate insulator film, and

a second step of removing the gate insulator film from the ion implanted damaged region selectively.

2. The method according to claim 1 , wherein the step of forming a gate insulator film comprises forming a high-temperature oxide film (HTO) by low pressure chemical vapor deposition (LP-CVD).

3. The method according to claim 1 , wherein the step of forming a gate insulator film comprises forming a TEOS film by low pressure chemical vapor deposition (LP-CVD).

4. The method according to claim 1 , wherein the first step comprises irradiating a first ion implantation species at a predetermined incident angle to the silicon oxide film on the bottom and the sidewalls of the trench, the silicon oxide film having a predetermined thickness, whereby to form the ion implanted damaged region in the portion of the silicon oxide film on the sidewalls of the trench or locally in the portion of the silicon oxide film on the sidewalls of the trench near the aperture thereof.

5. The method according to claim 4 , wherein the second step comprises etching the silicon oxide film utilizing the etching rate difference, in which the etching rate is faster in the ion implanted damaged region formed by implanting the first implantation species than in the undamaged region, whereby to leave the silicon oxide film to be thick on the bottom of the trench or to leave the silicon oxide film to be thick on the bottom of the trench and on the sidewalls of the trench near the bottom thereof.

6. The method according to claim 4 , wherein the second step comprises etching the silicon oxide film with a hydrofluoric acid aqueous solution.

7. The method according to claim 4 , wherein the first ion implantation species comprises inert gas ions.

8. The method according to claim 4 , wherein the first ion implantation species comprises ions of rare gas atoms including argon ions.

9. The method according to claim 4 , wherein the first implantation species comprises ions of halogen atoms.

10. A method for manufacturing a semiconductor device, comprising the steps of:

forming a trench having a bottom, sidewalls and an aperture in a semiconductor substrate;

forming a gate insulator film on the bottom and the sidewalls of the trench, the gate insulator film comprising a silicon oxide film having a thickness; and

removing at least partially a portion of the gate insulator film on the sidewalls of the trench near the aperture thereof so as to selectively reduce the thickness of the portion of the gate insulator film on the sidewalls of the trench near the aperture thereof, the step of removing being comprised of:

a first step of forming an ion implanted damaged region locally in at least a portion of the gate insulator film in the sidewalls of the trench, but not in the bottom of the trench, employing implantation ions which are halogen ions selected from the group consisting of fluorine, chlorine, bromine, and iodine and which are implanted into the exposed gate insulator film, and

a second step of removing the gate insulator film from the ion implanted damaged region selectively.

11. The method according to claim 10 , wherein the first step comprises irradiating a first ion implantation species at a predetermined incident angle to the silicon oxide film in at least a portion of the sidewalls of the trench but not in the bottom of the trench.

12. The method according to claim 10 , wherein the second step comprises etching the silicon oxide film utilizing the etching rate difference, in which the etching rate is faster in the ion implanted damaged region formed by implanting the first implantation species than in the undamaged region, whereby to leave the silicon oxide film to be thick on the bottom of the trench or to leave the silicon oxide film to be thick on the bottom of the trench and on the sidewalls of the trench near the bottom thereof.

13. The method according to claim 10 , wherein the second step comprises etching the silicon oxide film with a hydrofluoric acid aqueous solution.

Assignments (3)
MERGER AND CHANGE OF NAME Recorded Aug 26, 2011
From: FUJI ELECTRIC SYSTEMS CO., LTD. (FES); FUJI TECHNOSURVEY CO., LTD. (MERGER BY ABSORPTION)
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 026970/0872 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2010
From: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
To: FUJI ELECTRIC SYSTEMS CO., LTD.
Reel/Frame 024252/0438 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 21, 2006
From: SHIMOYAMA, KAZUO; KITAMURA, MUTSUMI; LU, HONGFEI
To: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
Reel/Frame 017711/0476 →