Semiconductor die attachment for high vacuum tubes
View Patent ↗There is described-novel bonding and interconnecting techniques for use with semiconductor die for the creation of thermally efficient, physically compliant Ultra High Vacuum Tubes and the novel tube resulting therefrom.
1. The method of bonding a semiconductor die onto an inner surface of a package in the manufacture of an ultra high vacuum tube comprising:
creating multiple bonding pads at a surface of a die,
creating multiple matching bonding pads at said inner surface of the package,
placing a braze material with a melting point of less than about 200° C. between the multiple bonding pads of the die and the multiple bonding pads of the package;
aligning the surfaces with said bonding pads together, and
carrying said surfaces while aligned together through a brazing cycle and then through an ultra high vacuum processing cycle.
2. The method of bonding a semiconductor die onto an inner surface of a package in the manufacture of an ultra high vacuum tube comprising:
creating multiple bonding pads at a surface of a die,
creating multiple matching bonding pads at said inner surface of the package,
placing a braze material that will not remelt during a ultra high vacuum processing at temperatures above about 200° C. between at least one of the multiple bonding pads of the die and one of the multiple matching bonding pads of the package,
placing a braze material have a melting point of less than about 200° C. between the remaining multiple bonding pads of the die and multiple matching bonding pads of the package;
aligning the surfaces with said bonding pads together, and
carrying said surfaces while aligned together through a brazing cycle and then through an ultra high vacuum processing cycle.
3. The method of making an image sensor comprising:
bonding a semiconductor die onto an inner surface of a ceramic package in the manufacture of an ultra high vacuum tube,
positioning a photocathode adjacent to said semiconductor die within the ceramic package,
creating multiple bonding posts at a surface of the semiconductor die,
creating multiple matching bonding posts at said inner surface of said ceramic package,
placing a braze material between the bonding posts of the semiconductor die and the bonding posts of the package,
aligning the surfaces with said bonding posts together, and
carrying said surfaces while pressed together through a brazing cycle and then through an ultra high vacuum processing cycle.
4. The method of claim 3 in which said braze material includes indium.
5. The method of claim 3 including positioning said photocathode and said semiconductor die so that a proximity focused image is created at the an input of said semiconductor die.
6. The method of bonding a semiconductor die onto an inner surface of a package in the manufacture of an ultra high vacuum tube comprising:
creating multiple bonding pads at a surface of a die,
creating multiple matching bonding pads at said inner surface of the package,
placing a braze material with a melting point of less than about 200° C. between the bonding pads of the die and the bonding pads of the package,
aligning the surfaces with said bonding pads together in the absence of fixtures, and
carrying said surfaces while aligned together through a brazing cycle and then through an ultra high vacuum processing cycle.
7. The method of bonding a semiconductor die onto an inner surface of a package in the manufacture of an ultra high vacuum tube comprising:
creating multiple bonding pads at a surface of a die,
creating multiple matching bonding pads at said inner surface of the package,
placing a braze material with a melting point of less than about 200° C. between the bonding pads of the die and the bonding pads of the package,
aligning the surfaces with said bonding pads together, and
maintaining said surfaces aligned together through a brazing cycle in which the forces to maintain alignment are generated by the surface tension of the braze material.
8. The method of claim 1 in which said semiconductor die comprises a silicon based die.
9. The method of claim 3 in which said semiconductor die comprises a silicon based die.
10. The method of claim 3 in which said braze material comprises an indium-tin alloy.
11. The method of claim 7 in which said braze material comprises an indium-tin alloy.