Method and apparatus capable of mitigating third order inter-modulation distortion in electronic circuits

1. A method of mitigating third order inter-modulation distortion in electronic circuits, comprising:

estimating an IP3 of said circuits using an empirical equation which includes at least one or more of the factors IP3˜IP3o−20 log Q+10 log F+10 log C−17.3 log k dBm and optimizing one or more of said factors such that the third order inter-modulation distortion is mitigated; and

wherein IP3o is related to the second and higher order derivatives of a C=f(V) function of a Varactor such that when these derivatives are reduced or tend towards zero, IP3o is increased or tends to infinity thereby optimizing IP3o.

2. The method of claim 1 , wherein two or more varactors are connected in series or parallel with different control voltages chosen such that the third order intermodulation products produced by the varactors cancel.

3. The method of claim 2 , wherein said voltages are achieved by holding one or more of the control voltages somewhere below the C=f(V) function's inflection point and the others somewhere above.

4. The method of claim 1 , wherein the magnitude of said derivatives are reduced by Operating MEMS voltage tunable capacitors at RF voltage swings smaller than the magnitude of the bias voltage changes required to overcome the mechanical stiction of the moving parts of the MEMS voltage tunable capacitors.