Automatic equalization of video signals
View Patent ↗A video compensation system for analog video transmission is described. The compensation system is employed in an analog video switching circuit such that each time a conductive path is switched, the system automatically tests the new switch path for a new compensation value. The compensation value is determined by measuring the response of the new path to a set of tones that are applied to the conductive path, the response to which is measured against a table of responses previously recorded. The measured responses are compared to the recorded responses to determine an appropriate compensation control voltage, which is applied to an equalizer system. In an alternative embodiment, the skew compensations also provided between red, green, and blue twisted pair lines in the cables by performing comparative analysis between corresponding pairs of the red, green, and blue signals.
1. Analog video de-skew circuitry for video compensation of color video transmitted on cables having different transmission delays, comprising:
a switch to receive on three inputs respective ones of three color video components, and to select for output two of said three color video components, followed by another two of said color video components, followed by at least one reciprocal of either of said two sets of two color video components;
square-up circuitry to substantially square the edges of each of said pairs of two color video components;
phase detector to detect a phase difference between said squared up color video components;
an integrator coupled to the output of the phase detector;
a digitizer to digitize the output of the integrator;
a processor to produce control signals in response to the output of the integrator; and
delay circuits to impose selective delays on the three color video components based on the control signals.
2. A circuitry as in claim 1 , wherein one or more of the square up circuitry, phase detector, integrator, digitizer, and processor are included on a common integrated circuit.
3. A circuitry as in claim 1 , wherein the delay circuits include an additive switch controlling a plurality of binary delay values.