IP Library Granted Patent US 7,248,103
Granted Patent B2
US 7,248,103 · App. 11/336,121 · Granted Jul 24, 2007

Complex band-pass filter

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Quick Facts
Patent No.
US 7,248,103
App. No.
11/336,121
Granted
Jul 24, 2007
Kind
B2
Abstract

A complex band-pass filter. The complex band-pass filter includes a band-pass filter coupled to a voltage source. The band-pass filter includes a first plurality of transconductors that receives a first voltage, where the first voltage controls the center frequency of the band-pass filter. The band-pass filter also includes a second plurality of transconductors, wherein the second plurality of transconductors receives a second voltage, where the second voltage controls the bandwidth of the band-pass filter. According to the system disclosed herein, the complex band-pass filter has automatic frequency tuning against process variations, a programmable center frequency, and a programmable bandwidth. Providing programmability to the center frequency (Fc) and bandwidth (BW) offers an alternative for multi-protected standards with different channels (Fc changes) and for time acquisition improvements (BS changes).

Claims (27)

1. A circuit comprising:

a band-pass filter coupled to a voltage source, wherein the voltage source is a phase locked loop (PLL) that outputs a control voltage, the band-pass filter comprising:

a first plurality of transconductors that receives a first voltage, wherein the first voltage controls the center frequency of the band-pass filter;

a second plurality of transconductors coupled to the first plurality of transconductors, wherein the second plurality of transconductors receives a second voltage, wherein the second voltage controls the bandwidth of the band-pass filter,

a first buffer coupled between the PLL and the first plurality of transconductors;

a second buffer coupled to the PLL and the second plurality of transconductors; and wherein the first and second voltages track the control voltage to provide automatic frequency tuning for the band-pass filter, wherein the first buffer controls the first voltage to control the center frequency of the band-pass filter, and wherein the second buffer controls the second voltage to control the bandwidth of the band-pass filter.

2. The circuit of claim 1 wherein the first and second voltages equal the control voltage.

3. The circuit of claim 1 wherein the first and second buffers each include a voltage divider to control the first and second voltages to provide center frequency programmability and bandwidth programmability for the band-pass filter.

4. The circuit of claim 1 wherein the PLL comprises:

a voltage controlled oscillator (VCO); and

a VCO buffer that supplies the control voltage to the VCO.

5. The circuit of claim 4 wherein the VCO comprises a third plurality of transconductors.

6. The circuit of claim 1 wherein the transconductors of the circuit are gm-C differential transconductors.

7. The circuit of claim 1 wherein the transconductors of the circuit are Nauta transconductors.

8. A system comprising:

phase locked loop (PLL) that outputs a control voltage; and

a band-pass filter coupled to the PLL, the band-pass filter comprising:

a first plurality of transconductors adapted to receive a first voltage, wherein the first voltage controls the center frequency of the band-pass filter; and

a second plurality of transconductors coupled to the first plurality of transconductors and adapted to receive a second voltage, wherein the second voltage controls the bandwidth of the band-pass filter;

a first buffer coupled between the PLL and the first plurality of transconductors; and

a second buffer coupled to the PLL and the second plurality of transconductors, and wherein the first and second voltages track the control voltage to provide automatic frequency tuning for the band-pass filter, wherein the first buffer controls the first voltage to control the center frequency of the band-pass filter, and wherein the second buffer controls the second voltage to control the bandwidth of the band-pass filter.

9. The system of claim 8 wherein the PLL comprises:

a voltage controlled oscillator (VCO); and

a VCO buffer that supplies the control voltage to the VCO.

10. The system of claim 9 wherein the VCO comprises a third plurality of transconductors.

11. The system of claim 8 wherein the transconductors of the circuit are gm-C differential transconductors.

12. The system of claim 8 wherein the transconductors of the circuit are Nauta transconductors.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2010
From: ATMEL CORPORATION
To: ATMEL ROUSSET S.A.S.
Reel/Frame 024055/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2006
From: MARAIS, EMMANUEL
To: ATMEL CORPORATION
Reel/Frame 017488/0438 →