Circuit integrity in a packet-switched network
View Patent ↗Techniques for performing a continuity check operation include sending a pattern of bits over a packet network connection through a first interface on a packet network to a second interface on the packet network. The first interface is monitored for return of the pattern of bits over the packet network connection. A decision whether the continuity check is successful is based on whether the pattern of bits is detected at the first interface during the monitoring. The techniques can be used for both narrowband as well as broadband calls over the packet network.
1. A method of performing a continuity check operation comprising:
sending a sequence of cells, each cell having a specified pattern of bits, over a packet network connection through a first interface on the packet network to a second interface on the packet network;
monitoring the first interface for a return sequence of cells over the packet network connection; and
deciding whether the continuity check operation is successful based on whether a pattern of bits of the return sequence of cells matches the specified pattern of bits of the sent sequence of cells.
2. The method of claim 1 including providing a loop between incoming and outgoing packet streams associated with the packet network connection.
3. The method of claim 1 including repeatedly sending the pattern of bits over the packet network connection during the monitoring.
4. The method of claim 1 wherein the continuity check operation is performed during a set-up process for a narrowband call over the packet network.
5. The method of claim 1 wherein the continuity check operation includes sending Signaling System 7 messages.
6. The method of claim 1 wherein the pattern of bits sent over the packet network connection includes a first byte all of whose bits are a first value and a second byte all of whose bits are a second different value.
7. The method of claim 1 wherein the pattern of bits includes multiple bytes each having multiple bits, wherein a single bit in each byte has a value that differs from all other bits in the byte, and wherein the bit having the different value is shifted by one position between adjacent bytes.
8. The method of claim 1 wherein the pattern of bits includes first and second bytes each of whose bits alternate in value, and wherein the value of the second byte is the complement of the value of the first byte.
9. The method of claim 1 wherein the continuity check is considered a failure if the pattern of bits is not detected at the first interface during monitoring within a specified period.
10. An apparatus configured to adapt circuit-switched and packet-based bearers and configured to execute continuity check operations, the apparatus comprising a bit pattern generator and a bit pattern detector, wherein the pattern generator is arranged to generate a sequence of cells, each cell having a specified pattern of bits to be sent over a packet network connection, and the bit pattern detector is arranged to monitor a return sequence of cells over a packet network connection, wherein the apparatus is configured to decide whether a continuity check is successful based on whether a pattern of bits of the return sequence of cells matches the specified pattern of bits in the sent sequence of cells.
11. The apparatus of claim 10 wherein the bit pattern generator is arranged to send the pattern of bits repeatedly over the packet network connection.
12. The apparatus of claim 10 configured to perform the continuity check during a set-up process for a narrowband call over the packet network connection.
13. A communications system comprising:
a packet network; and
a first gateway comprising a bit pattern generator and a bit pattern detector, wherein the bit pattern generator is arranged to generate a sequence of cells, each cell having a specified pattern of bits to be sent over a connection in a packet network, and the bit pattern detector is arranged to monitor a return sequence of cells over a packet network connection, wherein the gateway is further configured to decide whether a continuity check is successful based on whether a pattern of bits of the return sequence of cells matches the specified pattern of bits in the sent sequence of cells.
14. The system of claim 13 including a second gateway coupled to a second interface on the packet network and configured to provide a loop between incoming and outgoing packet streams associated with the packet network connection.
15. The system of claim 13 wherein the bit pattern generator is arranged to send the pattern of bits repeatedly over the packet network connection.
16. The system of claim 13 wherein the first gateway is configured to perform a continuity check during a set-up process for a narrowband call over the packet network connection.
17. An article comprising a computer-readable storage medium including computer-executable instructions for causing a computer system to:
send a sequence of cells, each cell having a pattern of bits, over a packet network connection through a first interface on a packet network to a second interface on the packet network;
monitor the first interface for a return sequence of cells over the packet network connection; and
decide whether a continuity check is successful based on whether a pattern of bits of the return sequence of cells matches the specified pattern of bits in the sent sequence of cells.
18. The article of claim 17 including instructions for causing the computer system to:
provide a loop between incoming and outgoing packet streams associated with the packet network connection.
19. The article of claim 17 including instructions for causing the computer system to:
repeatedly send the sequence of cells over the packet network connection during the monitoring.
20. The article of claim 17 including instructions for causing the computer system to perform the continuity check during a set-up process for a narrowband call over a packet network.