IP Library Granted Patent US 7,480,787
Granted Patent B1
US 7,480,787 · App. 11/341,001 · Granted Jan 20, 2009

Method and structure for pipelining of SIMD conditional moves

Assignee: Sun Microsystems, Inc.
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Quick Facts
Patent No.
US 7,480,787
App. No.
11/341,001
Granted
Jan 20, 2009
Kind
B1
Abstract

A mask is first generated in a general-purpose integer register. The mask is generated by executing a single instruction multiple data (SIMD) instruction on a plurality of operands stored in a plurality of registers and by writing the result to the general-purpose integer register. Next, a conditional-move mask is generated in a register using the mask, and then the conditional-move mask is used in selecting operands from the plurality of operands to generate a result in another register.

Claims (45)

1. A computer-based method comprising:

generating a mask wherein said generating said mask includes:

executing a single instruction multiple data instruction on a plurality of operands stored in a first plurality of registers on a processor to generate said mask; and

storing said mask in an available register wherein said available register is one of a second plurality of registers on said processor;

generating a conditional-move mask in another register on said processor using said mask; and

using said conditional-move mask in selecting operands from said plurality of operands to generate a result in yet another register on said processor.

2. The computer-based method of claim 1 wherein said generating a mask further comprises:

comparing at least a first operand and a second operand in a first register in said first plurality of registers with at least a third operand and a fourth operand in a second register in said first plurality of registers wherein

said first operand is compared with said third operand;

said second operand is compared with said fourth operand;

said first operand is stored in a most significant field in said first register;

said second operand is stored in a second most significant field in said first register;

said third operand is stored in a most significant field in said second register; and

said fourth operand is stored in a second most significant field in said second register.

3. The computer-based method of claim 2 wherein said generating a mask further at least comprises

configuring a state of a most significant bit in said mask based upon a result of said comparison of said first and third operands; and

configuring a state of a second most significant bit in said mask based upon a result of said comparison of said second and fourth operands.

4. The computer-based method of claim 3 wherein said generating a conditional-move mask further at least comprises

using said state of said most significant bit in said mask in configuring a most significant field in said conditional-move mask.

5. The computer-based method of claim 4 wherein said generating a conditional-move mask further at least comprises

using said state of said second most significant bit in said mask in configuring a second most significant field in said conditional-move mask.

6. The computer based method of claim 5 wherein said using said conditional-move mask in selecting operands from said plurality of operands to generate a result in yet another register further comprises:

copying an operand from one of said first and second registers to said result register based on a value in said most significant field of said conditional-move mask.

7. The computer-based method of claim 1 wherein said generating a conditional-move mask further at least comprises

using a state of a bit in said mask to determine a state of a bit in a field of said conditional-move mask wherein said field of said conditional-move mask corresponds to said bit in said mask.

8. The computer-based method of claim 7 wherein said state of said bit in said corresponding field of said conditional-move mask is a logical inversion of said state of said bit in said mask.

9. The computer-based method of claim 1 wherein said using said conditional-move mask in selecting operands from said plurality of operands to generate a result in another register further comprises:

copying an operand from one of said plurality of registers to said yet another register based on a value in a sub-field of said conditional-move mask.

10. The computer-based method of claim 1 wherein said first plurality of registers comprises a plurality of floating point registers.

11. The computer-based method of claim 1 wherein said second plurality of registers comprises a plurality of general purpose integer registers.

12. The computer-based method of claim 1 wherein said yet another register is a floating point register.

13. A computer program product comprising a computer readable storage medium having embedded therein computer readable instructions for a method comprising:

generating a mask wherein said generating said mask includes:

executing a single instruction multiple data instruction on a plurality of operands stored in a first plurality of registers on a processor to generate said mask; and

storing said mask in an available register wherein said available register is one of a second plurality of registers on said processor;

generating a conditional-move mask in another register on said processor using said mask; and

using said conditional-move mask in selecting operands from said plurality of operands to generate a result in yet another register on said processor.

14. A system comprising:

a processor; and

a memory, coupled to said processor, storing instructions for a method comprising:

generating a mask wherein said generating said mask includes:

executing a single instruction multiple data instruction on a plurality of operands stored in a first plurality of registers on a processor to generate said mask; and

storing said mask in an available register wherein said available register is one of a second plurality of registers on said processor;

generating a conditional-move mask in another register on said processor using said mask; and

using said conditional-move mask in selecting operands from said plurality of operands to generate a result in yet another register on said processor.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037304/0137 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2006
From: CAPRIOLI, PAUL; SPRACKLEN, LAWRENCE A.; YIP, SHERMAN H.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 017506/0828 →