Digitally controlled RF amplifier with wide dynamic range output
View Patent ↗A push-pull amplifier efficiency provides a 4:1 (12 dB) course adjustment of power output by using a single digital control input. The amplifier is provided with an input voltage (VDD) having sixteen steps ranging from 1.25 volts to 3.00 volts. Based on the digital control, an integrated circuit switches between a high power mode and a low power mode. In the low power mode, the output voltage is equivalent to the input voltage. In the high power mode, the amplifier provides an output of twice the input voltage (or four times the power).
1. A wide dynamic range power amplifier comprising:
a first output driver adapted to receive a periodic signal and a power signal, and further adapted to generate a first push-pull output comprising an amplified replica of the periodic signal;
a level and phase processor adapted to receive the periodic signal and a control signal, wherein the level and phase processor is adapted to generate a phase shifted signal substantially representing a 180 degree phase shifted version of the periodic signal when the control signal indicates a high power mode, and wherein the level and phase processor is adapted to generate the phase shifted signal set to zero when the control signal indicates a low power mode;
a second output driver adapted to receive the phase shifted signal and generate a second push-pull output comprising an amplified replica of the phase shifted signal;
a first matching network and a primary coil residing in-series between the first push-pull output and the second push-pull output; and
a secondary coil and a second matching network adapted to cooperate with the primary coil to generate an output signal.
2. The power amplifier of claim 1 wherein the first output driver is adapted to receive the periodic signal as a square wave.
3. The power amplifier of claim 1 wherein the first output driver is adapted to receive the periodic signal as a carrier signal suitable for Radio Frequency (RF) transmission.
4. The power amplifier of claim 3 , further comprising an antenna configured to transmit the output signal, wherein the secondary coil is electrically connected to the antenna through the second matching network.
5. The power amplifier of claim 3 , wherein the first output driver is further adapted to receive a data signal.
6. The power amplifier of claim 5 further including a first NAND adapted to modulate the carrier signal with the data signal.
7. The power amplifier of claim 1 wherein the first matching network is a capacitor.
8. The power amplifier of claim 1 wherein the first output driver comprises in-series invertors, and wherein the second output driver comprises in-series invertors.
9. The power amplifier of claim 8 wherein the in-series invertors comprise in-series PMOS transistors in-parallel with in-series NMOS transistors.