Avalanche testing at final test of top and bottom FETs of a buck converter
View Patent ↗An avalanche test circuit for applying an avalanche test signal to a device under test, comprising a series combination of a voltage source and an inductance; a switching device connected in parallel with said series combination; a diode for being connected to a test terminal of said device under test, said diode being connected to a connection point of said inductance and said switching device; a common terminal of said device under test being connected to a connection point of said switching device and said voltage source.
1. A DC-DC converter module adapted for avalanche testing, comprising:
an input terminal and a ground terminal;
an input capacitance connected across said input and ground terminals;
top and bottom switching devices connected in series across said input and ground terminals;
a switched output terminal connected to a connection node of said top and bottom switching devices;
a control IC having respective terminals for receiving power from said input terminal, for receiving a switched output signal from said switched output terminal, and for connecting said top and bottom switching devices;
said module enclosing said top and bottom switching devices and said control IC;
at least one pair of pads inside said module, said pads being spaced apart and disconnccted from each other, for being bridged by a connector, for selectively connecting said IC to at least one of said input terminal and said switched output terminal.
2. A DC-DC converter module adapted for avalanche testing, comprising:
an input terminal and a ground terminal;
an input capacitance connected across said input and ground terminals;
top and bottom switching devices connected in series across said input and ground terminals;
a switched output terminal connected to a connection node of said top and bottom switching devices;
a control IC having respective terminals for receiving power from said input terminal, for receiving a switched output signal from said switched output terminal, and for controlling said top and bottom switching devices;
said module enclosing said top and bottom switching devices and said control IC and preventng external access thereto;
at least one pair of pads inside said module, said pads being spaced apart and disconnected from each other and being externally accessible through a portion of said module for being bridged by a connector outside of the module for selectively connecting said IC to at least one of said input terminal and said switched output terminal.
3. The module of claim 2 , wherein said selective connecting arrangement includes a respective pair of spaced-apart pads in a corresponding circuit in said module which interconnects said IC with said input terminal.
4. The module of claim 3 , wherein said selective connecting arrangement includes a respective pair spaced-apart pads in a corresponding circuit in said module which interconnects said IC with said switched output terminal.
5. The module of claim 2 , wherein said selective connecting arrangement includes a respective pair of spaced-apart pads in a corresponding circuit in said module which interconnects said IC with said switched output terminal.
6. An avalanche test circuit for applying an avalanche test signal to a device under test as claimed in claim 2 , comprising:
a series combination of a voltage source and an inductance;
a switching device connected in parallel with said series combination;
a diode for being connected to a test terminal of said device under test, said diode being connected to a connection point of said inductance and said switching device;
a common terminal of said device under test being connected to a connection point of said switching device and said voltage source.
7. The circuit of claim 6 , wherein said device under test is a MOSFET, said test terminal being the drain of said MOSFET.
8. The circuit of claim 6 , wherein the cathode of said diode is connected to said test terminal and the anode is connected to said connection point of said inductance and said switching device.
9. The circuit of claim 6 , wherein said switching device is a MOSFET.