Blank bit and processor instructions employing the blank bit
View Patent ↗Reading a value into a register, checking to see if the value is a NULL, and then jumping out of a loop if the value is a NULL is a common task that processors perform. To speed performance of such a task, a novel “blank bit” is added to the flag register of a processor. When a first instruction (arithmetic, logic or load) is executed, the instruction operands are checked to see if any is a NULL character value. Information on the result of the check is stored in the blank bit. Execution of a second instruction uses the information stored in the blank bit to determine whether or not a second operation (for example, a jump) will be performed. By using the first and second instructions in a loop, the number of instructions executed to check for NULLs at the end of strings and arrays is reduced.
1. A method comprising:
(a) executing a first instruction, comprising:
storing a first value in a bit if a first operand of the first instruction is equal to zero, otherwise storing a second value in the bit; and
after the storing in (a) performing a first operation associated with the first instruction using the first operand; and
(b) executing a second instruction, comprising:
performing a second operation associated with the second instruction if the bit is storing the first value, otherwise not performing the second operation.
2. The method of claim 1 , wherein the first operation also uses a second operand, and wherein the step of storing the first value comprises:
storing the first value in the bit if either one or both of the first operand and the second operand is equal to zero.
3. The method of claim 2 , wherein the second instruction is a conditional jump instruction.
4. The method of claim 2 , wherein the first and second instructions are assembly code instructions.
5. The method of claim 2 , wherein the first and second instructions are machine code instructions.
6. The method of claim 5 , wherein the first operand is stored in a first register of a processor, wherein the second operand is stored in a second register of the processor, wherein the first operation is an arithmetic operation, and wherein the performing of the first operation causes the first operand in the register to be overwritten with a result of the arithmetic operation.
7. The method of claim 6 , wherein the first value can be stored in step (a) if the first instruction is an instruction of a type taken from the group consisting of: an arithmetic operation, a load operation, a shift operation, and a logic operation.
8. The method of claim 5 , wherein the first operand is stored in a first register of a processor, wherein the second operand is stored in a second register of the processor, wherein the first operation is an arithmetic operation, and wherein the performing of the first operation does not cause the first operand in the register to be overwritten with a result of the arithmetic operation.
9. The method of claim 2 , wherein the first instruction compares a first character value of a first string to a second character value of a second string, and wherein the first value is stored in the bit if either the first character value is a binary zero, or if the second character value is a binary zero, or if both the first character value and the second character value are both binary zeros.
10. The method of claim 1 , wherein the second operation is a jump operation.
11. The method of claim 1 , wherein the bit is a bit in a flag register, the flag register also including a zero bit.
12. The method of claim 1 , wherein the first instruction reads an operand value from a memory, wherein execution of the first instruction extends the operand value to generate the first operand, wherein the operand value has a first number of bits and wherein the first operand has a second number of bits.
13. An integrated circuit, comprising:
a flag register, wherein the flag register comprises a zero bit, a blank bit, a carry bit, and an overflow bit; and
means for executing a machine code instruction, wherein execution of the machine code instruction involves: 1) storing a first value in the blank bit if both a first operand and a second operand of an arithmetic operation are equal to zero or if either the first operand or the second operand of the arithmetic operation is equal to zero, otherwise storing a second value in the blank bit, 2) then performing the arithmetic operation using the first operand and the second operand, and 3) storing the first value in the zero bit if a result of the arithmetic operation is zero, otherwise storing the second value in the zero bit.
14. The integrated circuit of claim 13 , wherein the means is also for executing a conditional jump machine code instruction, wherein execution of the conditional jump machine code instruction involves performing a jump operation if the blank bit is storing the second value.