IP Library Granted Patent US 7,288,999
Granted Patent B1
US 7,288,999 · App. 11/347,956 · Granted Oct 30, 2007

Pre-distortion system for a synthesizer having modulation applied in the reference path

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Quick Facts
Patent No.
US 7,288,999
App. No.
11/347,956
Granted
Oct 30, 2007
Kind
B1
Abstract

A system providing a phase or frequency modulated signal is provided. In general, the system includes a phase locked loop (PLL) having a fractional-N divider in a reference path of the PLL operating to divide a reference frequency based on a pre-distorted modulation signal. Pre-distortion circuitry operates to provide the pre-distorted modulation signal by pre-distorting a modulation signal such that a convolution, or cascade, of the pre-distortion and a transfer function of the PLL results in a substantially flat frequency response for a range of modulation rates greater than a bandwidth of the PLL.

Claims (118)

1. A system comprising:

a) a phase locked loop system comprising:

i) loop circuitry adapted to provide an output signal based on a divided reference signal; and

ii) a fractional-N divider adapted to fractionally divide a reference signal based on a pre-distorted modulation signal to provide the divided reference signal such that the output signal is phase modulated; and

b) pre-distortion circuitry adapted to pre-distort a modulation signal to provide the pre-distorted modulation signal such that a convolution of a transfer function of the phase locked loop system and a transfer function of the pre-distortion circuitry provides a frequency response that is substantially flat for a range of modulation rates greater than a bandwidth of the phase locked loop system.

2. The system of claim 1 wherein the pre-distortion circuitry operates to provide a pre-distorted modulation shaping based on the equation:

g

pd

(

t

)

=

0

g

(

t

-

u

)

Laplace

-

1

{

1

/

H

(

s

)

,

u

}

u

,

wherein g pd (t) is the pre-distorted modulation shaping, g(t) is a desired modulation shaping, and H(s) is a transfer function of the phase locked loop system.

3. The system of claim 1 wherein the transfer function of the pre-distortion circuitry is substantially an inverse of the transfer function of the phase locked loop system.

4. The system of claim 1 wherein the loop circuitry adapted to provide the output signal comprises:

a phase detector adapted to compare a phase of the divided reference signal to a phase of a feedback signal;

a loop filter adapted to filter an output of the phase detector to provide a control signal;

controlled oscillator circuitry adapted to provide the output signal based on the control signal; and

feedback circuitry adapted to provide the feedback signal based on the output signal.

5. The system of claim 4 wherein the feedback circuitry comprises mixer circuitry adapted to multiply the output signal and a local oscillator signal to provide the feedback signal.

6. The system of claim 5 wherein the feedback circuitry further comprises filtering circuitry adapted to filter the feedback signal prior to providing the feedback signal to the phase detector.

7. The system of claim 5 wherein the phase locked loop system comprises a second phase locked loop adapted to provide the local oscillator signal based on a second reference signal.

8. The system of claim 7 wherein the local oscillator signal is also provided to the fractional-N divider as the reference signal.

9. The system of claim 7 wherein the second phase locked loop is a fractional-N phase locked loop and provides the local oscillator signal based on the second reference signal and a fractional divide value.

10. The system of claim 1 further comprising combiner circuitry adapted to combine an initial fractional divide value and the pre-distorted modulation signal to provide a combined fractional divide value, wherein the combined fractional divide value is provided to the fractional-N divider to control a fractional-N divide value of the fractional-N divider.

11. The system of claim 10 wherein the combiner circuitry has a digital interface and the pre-distorted modulation signal is a digital signal.

12. The system of claim 11 wherein the system is part of modulation circuitry in a transmitter of a mobile terminal and the modulation circuitry provides an all digital path from processing circuitry of the mobile terminal to the digital interface of the combiner circuitry.

13. A method for providing a modulated signal using a phase locked loop system comprising:

pre-distorting a modulation signal to provide a pre-distorted modulation signal;

fractionally dividing a reference signal based on the pre-distorted modulation signal to provide a divided reference signal; and

providing an output signal based on the divided reference signal;

wherein pre-distorting the modulation signal comprises pre-distorting the modulation signal such that a cascade of a pre-distortion applied by the step of pre-distorting and a transfer function of the phase locked loop system provides a frequency response that is substantially flat for a range of modulation rates greater than a bandwidth of the phase locked loop system.

14. The method of claim 13 wherein pre-distorting the modulation signal comprises pre-distorting the modulation signal based on the equation:

g

pd

(

t

)

=

0

g

(

t

-

u

)

Laplace

-

1

{

1

/

H

(

s

)

,

u

}

u

,

wherein g pd (t) is a pre-distorted modulation shaping, g(t) is a desired modulation shaping, and H(s) is a transfer function of the phase locked loop system.

15. The method of claim 13 wherein the pre-distortion applied by the pre-distorting step is defined by a transfer function substantially equal to an inverse of the transfer function of the phase locked loop system.

16. The method of claim 13 wherein providing the output signal comprises:

comparing a phase of the divided reference signal to a phase of a feedback signal to provide a phase detection signal;

low-pass filtering the phase detection signal to provide a control signal;

providing the output signal based on the control signal; and

providing the feedback signal based on the output signal.

17. The method of claim 16 wherein providing the feedback signal comprises multiplying the output signal and a local oscillator signal to provide the feedback signal.

18. The method of claim 17 wherein providing the feedback signal further comprises filtering the feedback signal.

19. The method of claim 17 further comprising providing a second phase locked loop adapted to provide the local oscillator signal based on a second reference signal.

20. The method of claim 19 further comprising providing the local oscillator signal as the reference signal.

21. The method of claim 13 wherein fractionally dividing the reference signal comprises:

combining an initial fractional divide value and the pre-distorted modulation signal to provide a combined fractional divide value; and

fractionally dividing the reference signal based on the combined fractional divide value to provide the divided reference signal.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2018
From: QORVO US, INC.
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 044579/0123 →
MERGER Recorded Jun 16, 2016
From: RF MICRO DEVICES, INC.
To: QORVO US, INC.
Reel/Frame 039196/0941 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS (RECORDED 3/19/13 AT REEL/FRAME 030045/0831) Recorded Mar 30, 2015
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: RF MICRO DEVICES, INC.
Reel/Frame 035334/0363 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Mar 19, 2013
From: RF MICRO DEVICES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 030045/0831 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2006
From: HIETALA, ALEXANDER WAYNE; BUNCH, RYAN LEE; HUMPHREYS, SCOTT ROBERT; HUNT, BARRY TRAVIS, JR.
To: RF MICRO DEVICES, INC.
Reel/Frame 017548/0961 →