IP Library Granted Patent US 7,329,557
Granted Patent B2
US 7,329,557 · App. 11/351,526 · Granted Feb 12, 2008

Method of manufacturing solid-state imaging device with P-type diffusion layers

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Quick Facts
Patent No.
US 7,329,557
App. No.
11/351,526
Granted
Feb 12, 2008
Kind
B2
Abstract

A solid-state imaging device includes: a plurality of N-type photodiode regions formed inside a P-type well; a gate electrode having one edge being positioned adjacent to each of the photodiode regions; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a STI structure, and a gate oxide film having a thickness of not more than 10 nm. One edge of the gate electrode overlaps the photodiode region. First, second and third regions are formed on a surface portion extending from the photodiode region to the drain region, in conditions such that the first region is disposed with a predetermined distance from one edge of the gate electrode and has a P-type first concentration C 1 , the second region is disposed with one edge positioned adjacent to the first region and the other edge overlapping the gate electrode and has a P-type second concentration C 2 , and the third region is disposed with one edge positioned adjacent to the second region and the other edge positioned adjacent to the drain region and has a P-type third concentration C 3 , wherein C 1 >C 2 >C 3 or C 1 ≈C 2 >C 3 . The readout characteristic at a low voltage is satisfactory, and image defects such as white flaws and dark current are suppressed sufficiently.

Claims (50)

1. A method of manufacturing a solid-state imaging device that comprises a plurality of pixels, each pixel having: a N-type photodiode region that is formed inside a P-type well of a Si substrate in order to photoelectrically convert incident light; a gate electrode having one edge portion positioned so as to overlap the photodiode region; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a shallow trench isolation structure for isolating the respective photodiode regions of the pixels from the photodiode region of an adjacent pixel; and a gate oxide film having a thickness of not more than 10 nm, the method comprising:

forming the photodiode region;

forming a first region, a second region and a third region on a surface portion extending from the upper portion of the photodiode region to the drain region in each of the pixels; and

forming the gate electrode so that the one edge portion overlaps the photodiode region,

wherein the first region is disposed at a predetermined distance from one edge of the gate electrode and has a P-type first concentration C 1 , the second region is disposed with one edge positioned adjacent to the first region and the other edge overlapping the gate electrode in a certain region and has a P-type second concentration C 2 , in which a predetermined part of the second region does not overlap the photodiode region and a whole part of the P-type well under the predetermined part of the second region is of a P-type,

the third region is disposed with one edge positioned adjacent to the second region and the other edge positioned adjacent to the drain region and has a P-type third concentration C 3 , with the respective concentrations being in a relationship of C 1 >C 2 >C 3 or C 1 ≈C 2 >C 3 , and

the respective concentrations are adjusted by controlling a dose of ion implantation for forming the P-type diffusion layers.

2. A method of manufacturing a solid-state imaging device that comprises a plurality of pixels, each pixel having: a N-type photodiode region that is formed inside a P-type well of a Si substrate in order to photoelectrically convert incident light; a gate electrode having one edge portion positioned so as to overlap the photodiode region; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a shallow trench isolation structure for isolating the respective photodiode regions of the pixels from the photodiode region of an adjacent pixel; and a gate oxide film having a thickness of not more than 10 nm, the method comprising:

forming the photodiode region;

forming a first region, a second region and a third region on a surface portion extending from the upper portion of the photodiode region to the drain region in each of the pixels; and

forming the gate electrode so that the one edge portion overlaps the photodiode region,

wherein the first region is disposed with a predetermined d/stance from one edge of the gate electrode and has a P-type first concentration C 1 , the second region is disposed with one edge positioned adjacent to the first region and the other edge overlapping the gate electrode in a certain region and has a P-type second concentration C 2 , in which a predetermined part of the second region does not overlap the photodiode region and a whole part of the P-type well under the predetermined part of the second region is of a P-type, and the third region is disposed with one edge positioned adjacent to the second region and the other edge positioned adjacent to the drain region and has a P-type third concentration C 3 , with the respective concentrations being in a relationship of C 1 >C 2 >C 3 , and a P-type diffusion layer of the second region is formed by a heat treatment of the first region so as to be extended to the part below the gate electrode, thereby differentiating the concentration C 1 for the concentration C 2 .

3. A method of manufacturing a solid-state imaging device including a plurality of pixel, each pixel having:

a N-type photodiode region that is formed inside a P-type well of a Si substrate in order to photoelectrically convert incident light; a gate electrode having one edge portion positioned so as to overlap the photodiode region; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a shallow trench isolation structure for isolating the respective photodiode regions of the pixels from the photodiode region of an adjacent pixel; and a gate oxide film having a thickness of not more than 10 nm, the method comprising:

forming the photodiode region;

forming a first region, a second region and a third region on a surface portion extending from the upper portion of the photodiode region to the drain region in each of the pixels; and

forming the gate electrode so that the one edge portion overlaps the photodiode region,

wherein the first region is disposed at a predetermined distance from one edge of the gate electrode and has a P-type first concentration C 1 , the second region is disposed with one edge positioned adjacent to the first region and the other edge overlapping the gate electrode in a certain region and has a P-type second concentration C 2 , and the third region is disposed with one edge positioned adjacent to the second region and the other edge positioned adjacent to the drain region and has a P-type third concentration C 3 , with the respective concentrations being in a relationship of C 1 >C 2 >C 3 or C 1 ≈C 2 >C 3 ,

the respective concentrations are adjusted by controlling a dose of ion implantation for forming the P-type diffusion layers, and

an acceleration energy of ion implantation during formation of the second region is increased in comparison to formation of the first region and formation of the third region, thereby positioning a bottom of the P-type diffusion layer of the second region deeper than a bottom of the P-type diffusion layer of the first region and a bottom of the P-type diffusion layer of the third region.

4. A method of manufacturing a solid-state imaging device including a plurality of pixels, each pixel having:

a N-type photodiode region that is formed inside a P-type well of a Si substrate in order to photoelectrically convert incident light; a gate electrode having one edge portion positioned so as to overlap the photodiode region; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a shallow trench isolation structure for isolating the respective photodiode regions of the pixels from the photodiode region of an adjacent pixel; and a gate oxide film having a thickness of not more than 10 nm, the method comprising:

forming the photodiode region;

forming a first region, a second region and a third region on a surface portion extending from the upper portion of the photodiode region to the drain region in each of the pixels; and

forming the gate electrode so that the one edge portion overlaps the photodiode region,

wherein the first region is disposed at a predetermined distance from one edge of the gate electrode and has a P-type first concentration C 1 , the second region is disposed with one edge positioned adjacent to the first region and the other edge overlapping the gate electrode in a certain region and has a P-type second concentration C 2 , and the third region is disposed with one edge positioned adjacent to the second region and the other edge positioned adjacent to the drain region and has a P-type third concentration C 3 , with the respective concentrations being in a relationship of C 1 >C 2 >C 3 or C 1 ≈C 2 >C 3 ,

the respective concentrations are adjusted by controlling a dose of ion implantation for forming the P-type diffusion layers, and

acceleration energies of ion implantation during formation of the second region and formation of the third region are increased in comparison to formation of the first region, thereby positioning a bottom of the P-type diffusion layer of the second region and a bottom of the P-type diffusion layer of the third region deeper than a bottom of the P-type diffusion layer of the first region.

5. The method of manufacturing a solid-state imaging device according to claim 4 , wherein a bottom of the P-type diffusion layer of the second region and a bottom of the P-type diffusion layer of the third region are positioned deeper than a bottom of the P-type diffusion layer of the first region by a heat treatment carried out after ion implantation during formation of the second region and formation of the third region.

6. The method of manufacturing a solid-state imaging device according to claim 5 , wherein the heat treatment is performed by heat applied in a step of forming a gate oxide film.

7. The method of manufacturing a solid-state imaging device according to claim 6 , wherein a step of annealing at 1050° C. for at least 30 minutes is carried out after the step of forming the gate oxide film.

8. A method of manufacturing a solid-state imaging device including a plurality of pixels, each pixel having;

a N-type photodiode region that is formed inside a P-type well of a Si substrate in order to photoelectrically convert incident light; a gate electrode having one edge portion positioned so as to overlap the photodiode region; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a shallow trench isolation structure for isolating the respective photodiode regions of the pixels from the photodiode region of an adjacent pixel; and a gate oxide film having a thickness of not more than 10 nm, the method comprising:

forming the photodiode region;

forming a first region, a second region and a third region on a surface portion extending from the upper portion of the photodiode region to the drain region in each of the pixels; and

forming the gate electrode so that the one edge portion overlaps the photodiode region,

wherein the first region is disposed with a predetermined distance from one edge of the gate electrode and has a P-type first concentration C 1 , the second region is disposed with one edge positioned adjacent to the first region and the other edge overlapping the gate electrode in a certain region and has a P-type second concentration C 2 , and the third region is disposed with one edge positioned adjacent to the second region and the other edge positioned adjacent to the drain region and has a P-type third concentration C 3 , with the respective concentrations being in a relationship of C 1 >C 2 >C 3 ,

a P-type diffusion layer of the first region is extended to the part below the gate electrode by a heat treatment in order to form a P-type diffusion layer of the second region, thereby differentiating the concentration C 1 from the concentration C 2 , and

an acceleration energy of ion implantation during formation of the second region is increased in comparison to formation of the first region and formation of the third region, thereby positioning a bottom of the P-type diffusion layer of the second region deeper than a bottom of the P-type diffusion layer of the first region and a bottom of the P-type diffusion layer of the third region.

9. A method of manufacturing a solid-state imaging device including a plurality of pixels, each pixel having:

a N-type photodiode region that is formed inside a P-type well of a Si substrate in order to photoelectrically convert incident light; a gate electrode having one edge portion positioned so as to overlap the photodiode region; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a shallow trench isolation structure for isolating the respective photodiode regions of the pixels from the photodiode region of an adjacent pixel; and a gate oxide film having a thickness of not more than 10 nm, the method comprising:

forming the photodiode region;

forming a first region, a second region and a third region on a surface portion extending from the upper portion of the photodiode region to the drain region in each of the pixels; and

forming the gate electrode so that the one edge portion overlaps the photodiode region,

wherein the first region is disposed with a predetermined distance from one edge of the gate electrode and has a P-type first concentration C 1 , the second region is disposed with one edge positioned adjacent to the first region and the other edge overlapping the gate electrode in a certain region and has a P-type second concentration C 2 and the third region is disposed with one edge positioned adjacent to the second region and the other edge positioned adjacent to the drain region and has a P-type third concentration C 3 , with the respective concentrations being in a relationship of C 1 >C 2 >C 3 ,

a P-type diffusion layer of the first region is extended to the part below the gate electrode by a heat treatment in order to form a P-type diffusion layer of the second region, thereby differentiating the concentration C 1 from the concentration C 2 and

acceleration energies of ion implantation during formation of the second region and formation of the third region are increased in comparison to formation of the first region, thereby positioning a bottom of the P-type diffusion layer of the second region and a bottom of the P-type diffusion layer of the third region deeper than a bottom of the P-type diffusion layer of the first region.

10. The method of manufacturing a solid-state imaging device according to claim 9 , wherein a bottom of the P-type diffusion layer of the second region and a bottom of the P-type diffusion layer of the third region are positioned deeper than a bottom of the P-type diffusion layer of the first region by a heat treatment carried out after ion implantation during formation of the second region and formation of the third region.

11. The method of manufacturing a solid-state imaging device according to claim 10 , wherein the heat treatment is performed by heat applied in a step of forming a gate oxide film.

12. The method of manufacturing a solid-state imaging device according to claim 11 , wherein a step of annealing at 1050° C. for at least 30 minutes is carried out after the step of forming the gate oxide film.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2014
From: PANASONIC CORPORATION
To: COLLABO INNOVATIONS, INC.
Reel/Frame 033021/0806 →
LIEN Recorded Jan 13, 2014
From: COLLABO INNOVATIONS, INC.
To: PANASONIC CORPORATION
Reel/Frame 031997/0445 →
CHANGE OF NAME Recorded Jan 8, 2014
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 031947/0358 →