Method of enhancing an etch system
View Patent ↗Systems and techniques for enhanced etch processes. For example, a substrate may be received in an etch chamber, where the substrate comprises a handle layer, a bonding layer in communication with the handle layer, and a device layer in communication with the bonding layer. The device layer may comprise a device layer patterned therein and having a bottom surface, where the bottom surface of the device is attached to the bonding layer. The bonding layer may comprise an oxide annealed at relatively low temperature. A dry etch process may be performed to release the bottom surface of the device from the bonding layer.
1. A method, comprising:
receiving a substrate in an etch chamber, the substrate comprising a silicon on insulator (SOI) wafer, including a handle layer comprising an insulating layer, a bonding layer comprising a buried oxide layer in communication with the handle layer, and a device layer in communication with the bonding layer, the device layer comprising a silicon layer having one or more devices patterned therein, each device having a bottom surface attached to the bonding layer; and,
separating each of the one or more devices from the substrate, wherein separating each of the one or more devices from the substrate comprises releasing the bottom surface of each of the devices from the bonding layer using a dry etch process.
2. The method of claim 1 , further comprising transferring the devices using an automated pick and place system subsequent to releasing the bottom surface of each of the devices.
3. The method of claim 1 , wherein releasing the bottom surface of each of the devices from the bonding layer using the dry etch process comprises introducing an etchant comprising hydrofluoric acid into the etch chamber.
4. The method of claim 1 , wherein the silicon on insulator wafer comprises a wafer formed by bonding the insulating layer having an oxide thereon to the device layer having an oxide thereon.
5. The method of claim 1 , wherein the buried oxide layer comprises an oxide grown at a temperature in the range from 800° C. to 1000° C.
6. The method of claim 1 , wherein the buried oxide layer comprises an annealed buried oxide layer with an anneal temperature of between about 800° C. and about 1000° C.
7. A processing system comprising:
means for receiving a substrate in an etch chamber, the substrate comprising a silicon on insulator (SOI) wafer, including a handle layer comprising an insulator layer, a bonding layer comprising a buried oxide layer in communication with the handle layer, and a device layer in communication with the bonding layer, the device layer comprising a silicon layer having one or more devices patterned therein, each device having a bottom surface attached to the bonding layer; and,
means for releasing the bottom surface of each of the devices from the bonding layer using a dry etch process to separate each of the devices from the substrate.
8. The system of claim 7 , further comprising means for automatically picking and placing the device subsequent to releasing the bottom surfaces of each of the devices from the bonding layer.
9. The system of claim 7 , wherein the means for releasing the bottom surfaces of each of the devices from the bonding layer using the dry etch process comprises means for introducing an etchant comprising hydrofluoric acid into the etch chamber.
10. The system of claim 7 , wherein the silicon on insulator wafer comprises a wafer formed by bonding the insulating layer having an oxide thereon to the device layer having an oxide thereon.
11. The system of claim 7 , wherein the buried oxide layer comprises an oxide grown at a temperature in the range from 800° C. to 900° C.
12. The system of claim 7 , wherein the buried oxide layer comprises an annealed buried oxide layer with an anneal temperature of between about 900° C. and about 1000° C.
13. An article comprising a machine-readable medium embodying information indicative of instructions that when performed by one or more machines result in operations comprising:
receiving a substrate in an etch chamber, the substrate comprising a silicon on insulator (SOI) wafer, including a handle layer comprising an insulator layer, a bonding layer comprising a buried oxide layer in communication with the handle layer, and a device layer in communication with the bonding layer, the device layer comprising a silicon layer having one or more devices patterned therein, each device having a bottom surface attached to the bonding layer; and,
separating the plurality of devices from the substrate, wherein separating the plurality of devices from the substrate comprises releasing the bottom surface of each of the one or more devices from the bonding layer using a dry etch process.
14. The article of claim 13 , wherein the operations further comprise transferring the one or more devices using an automated pick and place system subsequent to releasing the bottom surface of each of the devices.
15. The article of claim 13 , wherein releasing the bottom surface of each of the devices from the bonding layer using the dry etch process comprises introducing an etchant comprising hydrofluoric acid into the etch chamber.
16. The article of claim 13 , wherein the operations further comprise positioning the substrate in an etching plane, and wherein releasing the bottom surface of each of the devices from the bonding layer using the dry etch process comprises transmitting one or more etchant materials toward the substrate in the etching plane.