Method of manufacturing a thin film transistor array panel
View Patent ↗A method for manufacturing a flexible display, includes forming a gate line including a plurality of gate electrodes with a first interval on a substrate having a coefficient of thermal expansion, sequentially depositing both a gate insulating layer covering the gate line and a semiconductor layer, etching the semiconductor layer by using a mask having a plurality of semiconductor patterns with a second interval different from the first interval to form a semiconductor, forming both a data line including a source electrode and a drain electrode on the semiconductor and the gate insulating layer, and forming a pixel electrode coupled with the drain electrode.
1. A method of manufacturing a display, comprising:
forming a gate line on a substrate, the gate line having a plurality of gate electrodes with a first interval provided between adjacent gate electrodes;
depositing a gate insulating layer that covers the gate line;
forming a semiconductor on the gate insulating layer, the forming a semiconductor including etching the semiconductor layer, the semiconductor including a plurality of semiconductor patterns with a second interval provided between adjacent semiconductor patterns, the second interval being different from the first interval corresponding to a coefficient of thermal expansion of the substrate on which the gate line and the semiconductor layer are formed;
forming a data line, a source electrode, and a drain electrode and the gate insulating layer; and
forming a pixel electrode coupled with the drain electrode.
2. The method of claim 1 , wherein a length of the second interval is equal to a sum of a length of the first interval and an expanded interval corresponding to the coefficient of thermal expansion of the substrate.
3. The method of claim 1 , wherein the second interval is about 100 ppm to about 500 ppm larger than the first interval.
4. The method of claim 1 , wherein the semiconductor is an island type semiconductor.
5. The method of claim 1 , further comprising:
forming a barrier layer on or below the substrate before forming the gate line.
6. The method of claim 1 , further comprising:
forming a passivation layer before forming the pixel electrode.
7. The method of claim 6 , wherein the passivation layer comprises a first layer made of an inorganic material, and a second layer made of an organic material.
8. The method of claim 1 , wherein the semiconductor layer comprises an intrinsic amorphous silicon layer and an extrinsic amorphous silicon layer.
9. The method of claim 1 , further comprising:
forming a color filter below the pixel electrode.
10. The method of claim 1 , wherein the display is a flexible display.
11. A method of forming gate patterns on a substrate, comprising:
forming a plurality of gate patterns by using a gate mask having a predetermined distance between center portions of adjacent gate electrodes to be formed on the substrate;
depositing a gate insulating layer and a semiconductor layer on the substrate; and
forming a plurality of adjacent semiconductor patterns by using a semiconductor masks the semiconductor patterns being spaced apart from each other at a distance that is equal the predetermined distance plus a distance relating to the coefficient of thermal expansion of the substrate on which the gate electrodes and the semiconductor layer are formed,
wherein center portions of the adjacent gate electrodes correspond with center portions of the adjacent semiconductor patterns due to the thermal expansion.
12. The method of claim 11 , wherein the substrate is plastic and a thermal expansion of the substrate is between about 100 ppm to about 500 ppm.