IP Library Granted Patent US 7,840,966
Granted Patent B2
US 7,840,966 · App. 11/371,638 · Granted Nov 23, 2010

Process scheduler employing adaptive partitioning of critical process threads

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,840,966
App. No.
11/371,638
Granted
Nov 23, 2010
Kind
B2
Abstract

A system is set forth that includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of the plurality of adaptive partitions has a corresponding processor time budget. One or more of the process threads are designated as critical threads. Each adaptive partition associated with a critical thread is assigned a corresponding critical time budget. The software code also includes a scheduling system that is executable by the processor for selectively allocating the processor to run the process threads based, at least in part, on the processor time budgets of the respective adaptive partitions. The scheduling system may allocate the processor to run a critical thread based on the available critical time budget of the associated adaptive partition even when the processor time budget of the associated adaptive partition has been exhausted. In one example, the scheduling system functions so that it only bills the critical time budget of an adaptive partition for time used to run an associated critical thread when the processor is overloaded and the critical time budget for the adaptive partition is concurrently exhausted. Methods of implementing such a system are also set forth.

Claims (77)

1. A system comprising:

a processor;

one or more memory storage units;

software code stored in the one or more memory storage units,

where the software code is executable by the processor to generate a plurality of adaptive partitions and to associate one or more process threads with each of the plurality of adaptive partitions, where each of the one or more process threads has a corresponding priority in the associated adaptive partition, where each of the plurality of adaptive partitions is assigned a corresponding standard processor time budget, and where the plurality of adaptive partitions comprise at least one critical adaptive partition to which at least one critical thread is assigned, and where the at least one critical adaptive partition is assigned a critical time budget as well as a standard processor time budget;

where the software code further comprises a scheduling system executable by the processor for allocating the processor to the process threads using the standard processor time budgets of the respective associated adaptive partitions, where execution of each thread of the one or more process threads of the plurality of adaptive partitions are individually attributed and accounted against the standard processor time budget of the adaptive partition associated with the executed thread;

where the scheduling system allocates the processor to the at least one critical thread based on an available amount of the critical time budget of the at least one critical adaptive partition when the standard processor time budget of the at least one critical adaptive partition has been exhausted, where execution of the at least one critical thread assigned to the at least one critical adaptive partition is individually attributed and counted against the critical time budget of the at least one critical adaptive partition when the standard processor time budget of the at least one critical adaptive partition is exhausted and the processor is overloaded;

where the scheduling system microbills the standard processor time budget of an adaptive partition of the plurality of adaptive partitions associated with a given thread for a processor allocation used by the given thread, where the microbillinq takes place using a time interval less than a duration of a system tick.

2. The system of claim 1 , where the at least one critical thread is initiated by a processor interrupt.

3. The system of claim 1 , where the at least one critical thread is a child thread of a critical parent thread.

4. The system of claim 1 , where the at least one critical thread is designated as non-critical when it enters a blocking state.

5. The system of claim 1 , where the at least one critical thread is designated as critical by an API.

6. The system of claim 1 , where the scheduling system is a part of an operating system.

7. The system of claim 1 , where the processor is a symmetric multiprocessor.

8. The system of claim 1 , where the scheduling system microbills the critical time budget of the at least one critical adaptive partition for a processor allocation used by the critical thread, where the microbilling takes place using a time interval less than a duration of a system tick.

9. The system of claim 1 , where the standard processor time budget of one or more of the plurality of adaptive partitions comprises a guaranteed portion of an entire time budget available for running the process threads on the processor.

10. A method of operating a process scheduler in a processing system having a processor and a plurality of software threads executable by the processor, the method comprising:

associating a first set of software threads with a first adaptive partition, where the first set of software threads have respective priority levels;

assigning a first standard processor time budget to the first adaptive partition;

associating a second set of software threads with a second adaptive partition, where the second set of software threads have respective priority levels;

assigning a second standard processor time budget to the second adaptive partition;

assigning a critical state to one or more software threads of the first and/or second set of software threads;

assigning a critical time budget to each of the first and/or second adaptive partitions having the one or more software threads assigned the critical state;

allocating the processor to run the software threads of the first and second set of software threads using the standard processor time budgets of the first and second adaptive partitions, respectively;

individually attributing and accounting execution of each software thread of the first and second set of software threads of the first and second adaptive partitions against the standard processor time budget of the first or second adaptive partition associated with each software thread;

allocating the processor to run the one or more software threads assigned the critical state using an available amount of the critical time budget of the first or second adaptive partition associated with the one or more software threads assigned the critical state when the standard processor time budget of the first or second adaptive partition associated with the one or more software threads assigned the critical state is exhausted; and

microbilling the critical time budget of the first or second adaptive partition for a processor allocation used by the one or more software threads assigned the critical state when the standard processor time budget of the first or second adaptive partition associated with the one or more software threads assigned the critical state is exhausted and the processor is concurrently overloaded, where the microbilling takes place using a time interval less than a duration of a system tick.

11. The method of claim 10 , and further comprising:

billing the critical time budget of the first or second adaptive partition associated with the one or more software threads assigned the critical state for a processor allocation used by the one or more software threads assigned the critical state of the first or second adaptive partition when the standard processor time budget of the first or second adaptive partition associated with the one or more software threads assigned the critical state is exhausted and the processor is concurrently overloaded.

12. The method of claim 10 , and further comprising:

generating an interrupt thread in response to a processor interrupt; and

assigning a critical state to the interrupt thread.

13. The method of claim 10 , and further comprising:

generating a child thread from a critical parent thread; and

assigning a critical state to the child thread.

14. The method of claim 10 , and further comprising:

designating a critical thread as non-critical when the critical thread enters a blocking state.

15. The method of claim 10 , and further comprising:

using an API to assign a critical state to one or more of the software threads of the first and/or second set of software threads.

16. The method of claim 10 , and further comprising:

microbilling the standard processor time budget of the first or second adaptive partition associated with a given software thread for a processor allocation used by the given software thread, where the microbilling takes place using a time interval less than a duration of a system tick.

17. A system comprising:

a processor;

one or more memory storage units;

software code stored in the one or more memory storage units,

where the software code is executable by the processor to generate a plurality of adaptive partitions and to associate one or more process threads with each of the plurality of adaptive partitions, where each of the one or more process threads has a corresponding priority in the associated adaptive partition, where each of the plurality of adaptive partitions is assigned a corresponding standard processor time budget comprising a guaranteed portion of an entire time budget available for the processor, and where the plurality of adaptive partitions comprise at least one critical adaptive partition to which at least one critical thread is assigned, and where the at least one critical adaptive partition is assigned a critical time budget as well as a standard processor time budget;

where the software code further comprises a scheduling system executable by the processor for allocating the processor to the process threads using the standard processor time budgets of the respective associated adaptive partitions, where execution of each thread of the one or more process threads of the plurality of adaptive partitions are individually attributed and accounted against the standard processor time budget of the adaptive partition associated with the executed thread;

where the scheduling system designates a critical thread as non-critical when the critical thread enters a blocking state; and

where the scheduling system allocates the processor to the at least one critical thread based on an available amount of the critical time budget of the at least one critical adaptive partition when the standard processor time budget of the at least one critical adaptive partition has been exhausted, where execution of the at least one critical thread assigned to the at least one critical adaptive partition is individually attributed and microbilled against the critical time budget of the at least one critical adaptive partition when the standard processor time budget of the at least one critical adaptive partition is exhausted and the processor is overloaded.

18. The system of claim 17 , where the at least one critical thread is initiated by a processor interrupt.

19. The system of claim 17 , where the at least one critical thread is a child thread of a critical parent thread.

20. The system of claim 17 , where the at least one critical thread is designated as non-critical when it enters a blocking state.

21. The system of claim 17 , where the at least one critical thread is designated as critical by an API.

22. The system of claim 17 , where the scheduling system is a part of an operating system.

23. A system comprising:

a processor;

one or more memory storage units;

software code stored in the one or more memory storage units,

where the software code is executable by the processor to generate a plurality of adaptive partitions and to associate one or more process threads with each of the plurality of adaptive partitions, where each of the one or more process threads has a corresponding priority in the associated adaptive partition, where each of the plurality of adaptive partitions is assigned a corresponding standard processor time budget, and where the plurality of adaptive partitions comprise at least one critical adaptive partition to which at least one critical thread is assigned, and where the at least one critical adaptive partition is assigned a critical time budget as well as a standard processor time budget;

where the software code further comprises a scheduling system executable by the processor for allocating the processor to the process threads using the standard processor time budgets of the respective associated adaptive partitions, where execution of each thread of the one or more process threads of the plurality of adaptive partitions are individually attributed and accounted against the standard processor time budget of the adaptive partition associated with the executed thread; and

where the scheduling system allocates the processor to the at least one critical thread based on an available amount of the critical time budget of the at least one critical adaptive partition when the standard processor time budget of the at least one critical adaptive partition has been exhausted, where execution of the at least one critical thread assigned to the at least one critical adaptive partition is individually attributed and microbilled against the critical time budget of the at least one critical adaptive partition when the standard processor time budget of the at least one critical adaptive partition is exhausted and the processor is overloaded, where the microbilling takes places using a time interval less than a duration of a system tick.

24. A system comprising:

a processor;

one or more memory storage units;

software code stored in the one or more memory storage units,

where the software code is executable by the processor to generate a plurality of adaptive partitions and to associate one or more process threads with each of the plurality of adaptive partitions, where each of the one or more process threads has a corresponding priority in the associated adaptive partition, where each of the plurality of adaptive partitions is assigned a corresponding standard processor time budget, and where the plurality of adaptive partitions comprise at least one critical adaptive partition to which at least one critical thread is assigned, and where the at least one critical adaptive partition is assigned a critical time budget as well as a standard processor time budget;

where the software code further comprises a scheduling system executable by the processor for allocating the processor to the process threads using the standard processor time budgets of the respective associated adaptive partitions, where execution of each thread of the one or more process threads of the plurality of adaptive partitions are individually attributed and accounted against the standard processor time budget of the adaptive partition associated with the executed thread;

where the scheduling system allocates the processor to the at least one critical thread based on an available amount of the critical time budget of the at least one critical adaptive partition when the standard processor time budget of the at least one critical adaptive partition has been exhausted, where execution of the at least one critical thread assigned to the at least one critical adaptive partition is individually attributed and counted against the critical time budget of the at least one critical adaptive partition when the standard processor time budget of the at least one critical adaptive partition is exhausted and the processor is overloaded; and

where the scheduling system microbills the critical time budget of the at least one critical adaptive partition for a processor allocation used by the critical thread, where the microbilling takes place using a time interval less than a duration of a system tick.

25. The system of claim 24 , where the at least one critical thread is initiated by a processor interrupt.

26. The system of claim 24 , where the at least one critical thread is a child thread of a critical parent thread.

27. The system of claim 24 , where the at least one critical thread is designated as non-critical when it enters a blocking state.

28. The system of claim 24 , where the at least one critical thread is designated as critical by an API.

29. The system of claim 24 , where the scheduling system is a part of an operating system.

30. The system of claim 24 , where the processor is a symmetric multiprocessor.

31. The system of claim 24 , where the scheduling system microbills the standard processor time budget of an adaptive partition of the plurality of adaptive partitions associated with a given thread for a processor allocation used by the given thread, where the microbilling takes place using a time interval less than a duration of a system tick.

32. The system of claim 24 , where the standard processor time budget of one or more of the plurality of adaptive partitions comprises a guaranteed portion of an entire time budget available for running the process threads on the processor.

Assignments (13)
NUNC PRO TUNC ASSIGNMENT Recorded Jun 19, 2023
From: BLACKBERRY LIMITED
To: MALIKIE INNOVATIONS LIMITED
Reel/Frame 064270/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2023
From: BLACKBERRY LIMITED
To: MALIKIE INNOVATIONS LIMITED
Reel/Frame 064104/0103 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2020
From: 2236008 ONTARIO INC.
To: BLACKBERRY LIMITED
Reel/Frame 053313/0315 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2014
From: 8758271 CANADA INC.
To: 2236008 ONTARIO INC.
Reel/Frame 032607/0674 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2014
From: QNX SOFTWARE SYSTEMS LIMITED
To: 8758271 CANADA INC.
Reel/Frame 032607/0943 →
CHANGE OF ADDRESS Recorded Feb 27, 2012
From: QNX SOFTWARE SYSTEMS LIMITED
To: QNX SOFTWARE SYSTEMS LIMITED
Reel/Frame 027768/0961 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2011
From: QNX SOFTWARE SYSTEMS GMBH & CO. KG
To: 7801769 CANADA INC.
Reel/Frame 026883/0544 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2011
From: 7801769 CANADA INC.
To: QNX SOFTWARE SYSTEMS LIMITED
Reel/Frame 026883/0553 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2010
From: QNX SOFTWARE SYSTEMS GMBH & CO. KG
To: QNX SOFTWARE SYSTEMS GMBH & CO. KG
Reel/Frame 025314/0733 →
CHANGE OF SEAT Recorded Oct 15, 2010
From: QNX SOFTWARE SYSTEMS GMBH & CO. KG
To: QNX SOFTWARE SYSTEMS GMBH & CO. KG
Reel/Frame 025179/0752 →
PARTIAL RELEASE OF SECURITY INTEREST Recorded Jun 3, 2010
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: HARMAN INTERNATIONAL INDUSTRIES, INCORPORATED; QNX SOFTWARE SYSTEMS (WAVEMAKERS), INC.; QNX SOFTWARE SYSTEMS GMBH & CO. KG
Reel/Frame 024483/0045 →
SECURITY AGREEMENT Recorded May 8, 2009
From: HARMAN INTERNATIONAL INDUSTRIES, INCORPORATED; BECKER SERVICE-UND VERWALTUNG GMBH; CROWN AUDIO, INC.; HARMAN BECKER AUTOMOTIVE SYSTEMS (MICHIGAN), INC.; HARMAN BECKER AUTOMOTIVE SYSTEMS HOLDING GMBH; HARMAN BECKER AUTOMOTIVE SYSTEMS, INC.; HARMAN CONSUMER GROUP, INC.; HARMAN DEUTSCHLAND GMBH; HARMAN FINANCIAL GROUP LLC; HARMAN HOLDING GMBH & CO. KG; HARMAN MUSIC GROUP, INCORPORATED; HARMAN SOFTWARE TECHNOLOGY INTERNATIONAL BETEILIGUNGS GMBH; HARMAN SOFTWARE TECHNOLOGY MANAGEMENT GMBH; HBAS INTERNATIONAL GMBH; HBAS MANUFACTURING, INC.; INNOVATIVE SYSTEMS GMBH NAVIGATION-MULTIMEDIA; JBL INCORPORATED; LEXICON, INCORPORATED; MARGI SYSTEMS, INC.; QNX SOFTWARE SYSTEMS (WAVEMAKERS), INC.; QNX SOFTWARE SYSTEMS CANADA CORPORATION; QNX SOFTWARE SYSTEMS CO.; QNX SOFTWARE SYSTEMS GMBH; QNX SOFTWARE SYSTEMS GMBH & CO. KG; QNX SOFTWARE SYSTEMS INTERNATIONAL CORPORATION; QNX SOFTWARE SYSTEMS, INC.; XS EMBEDDED GMBH (F/K/A HARMAN BECKER MEDIA DRIVE TECHNOLOGY GMBH)
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 022659/0743 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2007
From: DODGE, DAN; DANKO, ATTILLA; MARINEAU-MES, SEBASTIEN; VAN DER VEEN, PETER; BURGESS, COLIN; FLETCHER, THOMAS; STECHER, BRIAN
To: QNX SOFTWARE SYSTEMS GMBH & CO. KG
Reel/Frame 018788/0096 →