Memory device and manufacturing method thereof
View Patent ↗A memory device in which both DRAM and phase-change memory (PCRAM) are mounted is provided with a DRAM bit line, a PCRAM bit line or a PCRAM source line formed on an conductive layer shared with the DRAM bit line, and a sense amplifier connected between the DRAM bit line and the PCRAM bit line. The memory device further has a capacitive element disposed on the upper layer of the DRAM bit line, and a phase-change element disposed on the upper layer of the PCRAM bit line. The lower electrode of the capacitive element and the lower electrode of the phase-change memory element are formed on the shared conductive layer.
1. A memory device comprising a DRAM and a phase-change memory (PCRAM) which are formed on a single semiconductor chip,
the semiconductor chip having a multilayer wiring structure including at least a first wiring layer at a first level and a second wiring layer at a second level different from the first level,
the DRAM having a DRAM bit line,
the PCRAM having a PCRAM bit line and a PCRAM source line,
the DRAM bit line being formed at the first level,
one of the PCRAM bit line and the PCRAM source line being formed at the first level, and
the other of the PCRAM bit line and the PCRAM source line being formed at the second level.
2. The memory device as claimed in claim 1 , further comprising a sense amplifier electrically connected between the DRAM bit line and the PCRAM bit line,
the sense amplifier operating in a first mode to amplify data stored in the DRAM and in a second mode to amplify data stored in the PCRAM.
3. The memory device as claimed in claim 1 , wherein the PCRAM bit line is formed at the first level and the PCRAM source line is formed at the second level, the first level being lower than the second level, the DRAM further having a capacitor which is formed between the first level and the second level.
4. The memory device as claimed in claim 1 , wherein the PCRAM bit line is formed at the first level and the PCRAM source line is formed at the second level, the first level being higher than the second level, the DRAM further having a capacitor which is formed between the first level and the second level.