Systems and methods for providing driving voltages to a display panel

1. A system for displaying images, comprising:

a data driving circuit, comprising a plurality of driving units being operative to generate analog voltage, to drive corresponding pixels according to data signals from a data bus, each driving unit comprising:

a temporary storage unit, operative to store N first digital data in sequence according to N control signals in a first period and outputting the N digital data in sequence according to M switching signals in a second period;

2N sets of latches connected in series;

2N sets of switching elements coupled between each two sets of latches and between the latches and the data bus respectively;

a digital-to-analog (DA) conversion unit, coupled to the temporary storage unit, and operative to convert the N first digital data to N analog voltages in sequence;

an analog buffering unit, operative to buffer the N analog voltages from the DA conversion unit; and

a de-multiplexer, operative to selectively output the N analog voltages to the corresponding pixels according to an enabling signal.

2. The system as claimed in claim 1 , wherein each driving unit outputs the N analog voltages to the corresponding pixels in sequence during the second period, and the driving unit receives N second digital data in sequence in the meantime.

3. The system as claimed in claim 1 , further comprising a synchronizer operative to synchronize the N digital data with the clock signals.

4. The system as claimed in claim 1 , wherein each temporary storage unit is controlled by the N control signals and M switching signals, such that each temporary storage unit stores the N first digital data in sequence in the first period and outputs the N analog voltages in the second period.

5. The system as claimed in claim 4 , wherein each de-multiplexer outputs the N analog voltages to the corresponding pixels in sequence according to the enabling signal.

6. The system as claimed in claim 1 , further comprising a horizontal shifter register operative to generate the N control signals.

7. The system as claimed in claim 1 , further comprising a timing controller operative to generate the M switching signals and a clock signal.

8. The system as claimed in claim 1 , further comprising a display panel, wherein the data driver is a portion of the display panel.

9. The system as claimed in claim 8 , wherein the display panel is an organic light emitting panel, an electroluminescent panel or a LCD panel.

10. The system as claimed in claim 8 , further comprising an electronic device, wherein the electronic device comprises:

the display panel; and

a power supply powering the display panel to display images.

11. The system as claimed in claim 10 , wherein the system is implemented as a PDA, a display monitor, a notebook computer, digital camera, car display, a tablet computer or a cellular phone.

12. A system for displaying images, comprising:

a first pixel;

a second pixel; and

a driving unit having a digital to analog converter unit and an analog buffering unit and being operative to drive the first pixel and the second pixel in sequence using the digital to analog unit and analog buffering unit for driving each of the first and second pixels with analog voltages, wherein the driving unit exhibits a width narrower than double RGB pixel pitch (2PP).

13. A system for displaying images, comprising:

a driving circuit, comprising at least one driving unit operative to generate analog voltages according to data signals from a data bus, said at least one driving unit comprising:

a temporary storage unit, operative to store first digital data and second digital data in sequence according to a first control signal and a second control signal and operative to output the first digital data and the second digital data in sequence according to first to third switching signals;

a digital-to-analog (DA) conversion unit, coupled to temporary storage unit, operative to convert the first digital data and the second digital data to a first analog voltage and a second analog voltage;

an analog buffering unit, operative to buffer the first analog voltage and the second analog voltage from the DA conversion unit; and

a de-multiplexer, operative to output the first analog voltage and the second analog voltage to drive a first pixel and a second pixel in sequence according to an enabling signal.

14. The system as claimed in claim 13 , wherein the temporary storage unit comprises first to fourth sets of latches connected in series to store the first digital data and the second digital data.

15. The system as claimed in claim 14 , wherein the temporary storage unit further comprises first to fourth sets of switching elements coupled between the first set of latches and the data bus and between each two sets of the second to fourth sets of latches respectively and controlled by the first and second control signals and the first to third switching signals, storing the first and second digital data in sequence in the first period and outputs the N digital data in sequence in the second period.

16. The system as claimed in claim 15 , wherein the first and second sets of switching elements are turned on to store the first digital data to the second set of latches, and then the first set and second set of switching elements are turned on and off respectively to store the second digital data to the first set of latches, according to the first and second control signal, during the first period.

17. The system as claimed in claim 16 , wherein the third and fourth sets of switching elements are turned on to store the first digital data to the fourth set of latches and output to the DA conversion unit, and then the second set and third set of switching elements are turned on to store the second digital data to the third set of latches according to the first to third switching signal, during the second period.

18. The system as claimed in claim 17 , wherein the fourth set of switching elements are turned on to store the second digital data to the fourth set of latches and output to the DA conversion unit according to the first switching signal, during the second period.

19. The system as claimed in claim 18 , wherein the driving unit outputs the first and second analog voltages to the corresponding pixels in sequence during the second period and the driving unit receives third digital data and fourth digital data in sequence in the meantime.

20. The system of claim 19 , wherein the first pixel and the second pixel are located in a pixel array adjacent to each other.

21. A method for providing driving voltages of a display panel, comprising:

storing first digital data and second digital data in sequence in a plurality of sets of latches connected in series according to first and second controls signals during a first period;

outputting the first digital data and a second digital data to a digital-to-analog conversion unit in sequence according to first, second and third switching signals during a second period;

converting the first digital data and the second digital data to a first driving voltage and a second driving voltage in sequence; and

outputting the first driving voltage and the second driving voltage to a first pixel and a second pixel in sequence according to an enabling signal.