Semiconductor device and manufacturing method thereof
An object of this invention is to prevent the NBTI degradation which may occur following the recent progress in miniaturization of the semiconductor device. By using a silicon nitride film, in which a concentration of Si—H bonds is not greater than 1×10 21 cm −3 , at least for a liner film or a second sidewall insulating film, the NBTI lifetime of the p-type MOS FET can be improved to be 1×10 9 seconds, which secures sufficient lifetime for the semiconductor integrated circuit device.
1 . A semiconductor integrated circuit device comprising a Metal Oxide Semiconductor field effect transistor disposed on a semiconductor substrate; wherein
a concentration of Si—H bonds comprised at least in one of a plurality of insulating films which is laid on a gate electrode of said Metal Oxide Semiconductor field effect transistor either directly touching or sandwiching a thin film therebetween is not greater than 1×10 21 cm −3 .
2 . A semiconductor integrated circuit device according to claim 1 , wherein either said insulating film laid thereon sandwiching a thin film therebetween is a silicon nitride film formed on a lateral face of said gate electrode or said insulating film directly touching the gate electrode is a silicon nitride film covering said gate electrode, source and drain, and a concentration of Si—H bonds comprised at least in one of the two silicon nitride films is not greater than 1×10 21 cm −3 .
3 . A method of manufacturing a semiconductor integrated circuit device wherein a Metal Oxide Semiconductor field effect transistor is formed in a region separated by an element isolation region that is formed on a semiconductor substrate; which at least comprising:
forming a gate insulating film in a region separated by said element isolation region;
forming a gate electrode;
forming a sidewall silicon nitride film on a lateral face of the gate electrode;
forming source/drain regions; and thereafter
forming a silicon nitride film; wherein
said sidewall silicon nitride film and said silicon nitride film are formed in such a way that a concentration of Si—H bonds in at least one of said silicon nitride films is not greater than 1×10 21 cm −3 .
4 . A method of manufacturing a semiconductor integrated circuit device according to claim 3 , wherein at least one of said sidewall silicon nitride film and said silicon nitride film covering the gate electrode, source and drain is formed, on said semiconductor substrate, from constitutive particles of the film which are produced in the presence of a catalyst through decomposition of a source gas.
5 . A method of manufacturing a semiconductor integrated circuit device according to claim 4 , wherein a temperature of said catalyst is exceed 1800° C.
6 . A method of manufacturing a semiconductor integrated circuit device according to claim 4 , wherein a temperature of said semiconductor substrate is not higher than 450° C.
7 . A method of manufacturing a semiconductor integrated circuit device according to claim 3 , which further comprises, after the step of forming either said sidewall silicon nitride film or said silicon nitride film covering said gate electrode, source and drain, the step of conducting annealing at an annealing temperature equal to or higher than the substrate temperature of the film.
8 . A method of manufacturing a semiconductor integrated circuit device according to claim 7 , wherein said annealing temperature is a range of 450° C. to 800° C.
9 . A method of manufacturing a semiconductor integrated circuit device according to claim 3; wherein
the forming said gate electrode comprises:
forming at least a metal film;
forming a silicon nitride film; and
patterning said silicon nitride film into the shape of a prescribed pattern and then forming a gate electrode by means of etching with said pattern being used as a mask; wherein
said silicon nitride film is formed, by the chemical vapor deposition method, on said semiconductor substrate, from constitutive particles of the film which are produced in the presence of a catalyst through decomposition of a source gas.
10 . A method of manufacturing a semiconductor integrated circuit device according to claim 3; wherein the forming said gate electrode comprises:
forming at least a metal film;
forming a silicon nitride film; and
patterning said silicon nitride film into the shape of a prescribed pattern and then forming a gate electrode by means of etching with said pattern being used as a mask; wherein
said nitride film is formed by the thermal CVD method and the step of conducting annealing at an annealing temperature set equal to or higher than the deposition temperature of the film is further comprised.
11 . A method of manufacturing a semiconductor integrated circuit device according to claim 11 , wherein said annealing is carried out either after the formation of said silicon film but before the formation of said gate electrode or after the formation of said gate electrode.