Fabrication of low leakage-current backside illuminated photodiodes
View Patent ↗Ultra-low leakage current backside-illuminated semiconductor photodiode arrays are fabricated using a method of formation of a transparent, conducting bias electrode layer that avoids high-temperature processing of the substrate after the wafer has been gettered. As a consequence, the component of the reverse-bias leakage current associated with strain, crystallographic defects or impurities introduced during elevated temperature processing subsequent to gettering can be kept extremely low. An optically transparent, conductive bias electrode layer, serving as both an optical window and an ohmic backside equipotential contact surface for the photodiodes, is fabricated by etching through the polysilicon gettering layer and a portion of the thickness of heavily-doped crystalline silicon layer formed within, and near the back of, the substrate during the gettering process.
1. A backside illuminated diode, comprising:
a semiconductor substrate of a first conductivity type, having a front surface and a rear surface, said rear surface adapted to receive illumination thereon, and said substrate including at least one structure of a second conductivity type opposite to said first conductivity type, said at least one structure formed adjacent to said front surface, and said semiconductor substrate including first and second portions which are homostructural with one another and which does not have an deposited electrode layer thereon, including the first portion which is unmodified substrate material that is unmodified from an original form of said substrate, and the second portion which is modified substrate material, modified from said original form to form a native conductive electrode layer adapted having a connection that receives a biasing potential thereon and where said biasing is applied to said second portion without being applied through a polysilicon layer.
2. A device as in claim 1 , further comprising an anti-reflective coating, formed connected to said second portion.
3. A device as in claim 2 , wherein said anti-reflective coating is formed of a material that is not indium tin oxide.
4. A device as in claim 2 , wherein said anti-reflective coating is formed of a multiple layer dielectric.
5. A device as in claim 2 , wherein said anti-reflective coating is a dielectric material.
6. A device as in claim 1 , wherein said native conductive layer of said substrate has a sheet resistivity between 50 and 100 Ω per square.
7. A device as in claim 1 , wherein said native conductive layer has a thickness between 0.25 and one μm.
8. A device as in claim 1 , further comprising a readout circuit, formed adjacent to said front surface.
9. A device as in claim 1 , wherein said substrate is an n-type substrate.